JPS58110094A - Method of producing printed circuit board - Google Patents

Method of producing printed circuit board

Info

Publication number
JPS58110094A
JPS58110094A JP21174381A JP21174381A JPS58110094A JP S58110094 A JPS58110094 A JP S58110094A JP 21174381 A JP21174381 A JP 21174381A JP 21174381 A JP21174381 A JP 21174381A JP S58110094 A JPS58110094 A JP S58110094A
Authority
JP
Japan
Prior art keywords
hole
printed wiring
wiring board
holes
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21174381A
Other languages
Japanese (ja)
Inventor
石渡 正翁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21174381A priority Critical patent/JPS58110094A/en
Publication of JPS58110094A publication Critical patent/JPS58110094A/en
Pending legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (1)発明の技術分野 本発明は印刷配線板の製造法に係り、とくに1個のスル
ーホー〜の内壁を相互に絶縁するよう複数に分割して、
高密度実装金可能とした印刷配線近年集積回路技術の発
達にはめざましいものがあり、これら集積回路を搭載す
る印鋺配線板の実装密度もますます高密度化の一途をた
どっている。
DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a method for manufacturing a printed wiring board, and in particular, the invention relates to a method for manufacturing a printed wiring board.
Printed wiring that enables high-density mounting In recent years, there have been remarkable developments in integrated circuit technology, and the mounting density of printed wiring boards on which these integrated circuits are mounted is also becoming higher and higher.

かかる情勢下において印刷配線板における集槓回路間の
接続数の飛躍的に向上したパターン化率の高い印刷配線
板の出現が要望されている。
Under these circumstances, there is a demand for a printed wiring board with a high patterning rate and a dramatic increase in the number of connections between collector circuits on the printed wiring board.

(8)従来技術と問題点 第1図(a)〜(2)は従来の印刷配線板の製造法の工
程を説明するための平面図および側断面図である。
(8) Prior Art and Problems FIGS. 1(a) to 1(2) are a plan view and a side sectional view for explaining the steps of a conventional printed wiring board manufacturing method.

第1図に)において、1はガラスエポキシ樹脂等からな
る絶縁Bitの両面に銅箔12を張付けた両面銅張積層
板で、第1図(至)は両面鋼張横1板lの所定の位置に
スμmホーホー下孔2を穿孔したAべ顧を表わし、第1
図(Q)においては該穿孔したスルーホーμ用下孔2の
内壁に無電解鋼メッキ法により導電層8を形成してヌル
−ホール4を形成したものである。該導電層8は次期メ
ッキ工程における通電層の役割を果す本のであって、メ
ッキの厚さは2μ#1〜5μm程度である。第1図(d
)に2いては前記工程を終了した両面綱張積春板lのス
ルーホ−μ4に対応するランド6と、鋏フンドロの引出
し信号パターン18と所定の配線パターン6を除いた部
分圧スクリーン印刷法またはフォト°Iシスト法により
メツキレシスト7を施したものである。
In Fig. 1), 1 is a double-sided copper-clad laminate with copper foil 12 pasted on both sides of an insulating bit made of glass epoxy resin, etc., and Fig. The figure shows a view of A where a micrometer pilot hole 2 is drilled at the first position.
In Figure (Q), a conductive layer 8 is formed on the inner wall of the drilled through-hole .mu. hole 2 by electroless steel plating to form a null hole 4. The conductive layer 8 serves as a current-carrying layer in the next plating process, and the thickness of the plating is approximately 2 μm to 5 μm. Figure 1 (d
2), the land 6 corresponding to the through-hole μ4 of the double-sided rope laminated spring board l completed the above process, the pull-out signal pattern 18 of the scissor fundo and the predetermined wiring pattern 6 are removed by partial pressure screen printing or photo printing. Metsukire cyst 7 was applied using the I cyst method.

第1図(e)は前記メツキレシスト7を施した両面鋼張
積層板lに電気メツキ法等によりフンドロと該フンドロ
の引出し信号パターン18および配線パターン6を形成
し規定厚にする。このランド6と、該フンドロの信号引
出し信号パターン18および配線パターン6の上に図示
しないエツチングレジ除去したるのち、第1図(2)に
おいてエツチングにより、スルーホー4/4.フンドロ
と該ランド6の引出し信号パターン1Bおよび配線パタ
ーン6を除く導電層8および銅箔12を除去し、その后
前記有磯物によるエツチングレジストを取り除いたもの
が従来の印刷配線板の製造法である。ところが、この印
刷配線板のスルmホーμはl信号の処理しかできない(
図例引出し信号パターン18)ためにパターン収容数が
低く迂[81経絡パターンまたはパターン化できずにジ
ャンパー線となるのでパターン長が長くなるための信号
遅延、さらにジャンパー接続線による信頼性の低下およ
びコストアップの要因となりさらに高密度寮鋏を阻筈す
るという欠点があった。
In FIG. 1(e), a fundo, an extraction signal pattern 18 for the fundo, and a wiring pattern 6 are formed on the double-sided steel clad laminate l on which the plating resist 7 has been applied by electroplating to a specified thickness. After removing an etching resist (not shown) on this land 6, the signal extraction signal pattern 18 and the wiring pattern 6 of the fundo, the through-holes 4/4. In the conventional printed wiring board manufacturing method, the conductive layer 8 and the copper foil 12 except for the lead-out signal pattern 1B and the wiring pattern 6 of the land 6 are removed, and then the etching resist made of the above-mentioned rock material is removed. be. However, the printed circuit board's sul m ho μ can only process l signals (
Figure example pull-out signal pattern 18) Due to the low number of patterns accommodated, the number of patterns is low and the pattern cannot be patterned and becomes a jumper line, resulting in a signal delay due to the longer pattern length, and a decrease in reliability due to the jumper connection line. This has the drawback of increasing costs and preventing high-density dormitories.

(4)発明の目的 本発明はと紀従来の欠点に鑑み% 1つのスルーホー〜
の内壁を複数に分割して、lスルーホールで複数の信号
線の処理を可能にした新規な印刷配線を機供することを
目的とするものでろる。
(4) Purpose of the Invention The present invention has been made in view of the drawbacks of the prior art.
The purpose of this is to divide the inner wall of the circuit into a plurality of parts to provide a new type of printed wiring that makes it possible to process multiple signal lines using one through hole.

(6)発明の構成 前述の目的を達成するために本発明は、111111用
網張積層板KIE数のスルーホールト、該スM−ホーp
に対応するランドを形成してなる印刷配線板の製造法に
おいて、前記両面鋼張積層板にスル−ホールの下孔を穿
孔し、該下孔の内壁に化学メッキにより導電層を形成し
た前記スルーホールの孔方向に沿った内壁が相互に絶縁
されるよう複数に分割し、該分割されたスルーホールの
内壁に対応するランドを形成したことによって達成され
る。
(6) Structure of the Invention In order to achieve the above-mentioned object, the present invention provides a through-hole for a mesh laminate KIE number for 111111,
In the method of manufacturing a printed wiring board, a pilot hole for a through hole is formed in the double-sided steel clad laminate, and a conductive layer is formed on the inner wall of the pilot hole by chemical plating. This is achieved by dividing the inner wall of the hole along the hole direction into a plurality of parts so as to be insulated from each other, and forming a land corresponding to the inner wall of the divided through hole.

(6)  発明の実施例 以下図面を参照しながら本発明に係る印刷配線板の製a
法の実施例について詳細に説明する。
(6) Examples of the invention Manufacturing a printed wiring board according to the present invention with reference to the drawings below.
Examples of the method will be described in detail.

第2図四〜(ロ)は本発明に係る印刷配線板の製造法の
製造工程の一実施例を説明するための平面図およびgI
ll断面図である。第2図において、この発明の印刷配
線板の製造法は第1図と同様、両面鋼張積層板にスルー
ホー〃および該スルーホールに対応するランドならびに
配線パターン等からなっているが、該スルーホールを複
数に分割した点に特徴を有する。したがって第2回向以
外の工程は引出しパターンを除き第1図と同じ符号を付
しており、ここではこれら工程の詳細説明は雀略する形
成したスルーホールを鎖孔に沿って複数の切込み9によ
り分割したスルーホー/I/8を形成して、該切込み9
0部分の導電層8を除去して絶縁層11を露出せしめた
るのち、第2図(e)のごとく前td分割したスルーホ
ーlv8の内壁に対応する分割されたフンドロと、前記
分割ランドより引き出す信号パターン14〜17と所定
の配線パターン6を除いた部分にスクリーン印刷法また
はフォトレジヌト法によりメツキレシスト7を施したも
のである。
Figures 2-4 to (b) are plan views and gI for explaining one embodiment of the manufacturing process of the printed wiring board manufacturing method according to the present invention.
ll sectional view. In FIG. 2, the manufacturing method of the printed wiring board of the present invention is similar to that in FIG. The feature is that it is divided into multiple parts. Therefore, steps other than the second turn are given the same reference numerals as in FIG. 1 except for the pull-out pattern, and detailed explanations of these steps are omitted here. Form a through hole /I/8 divided by the notch 9
After removing the conductive layer 8 in the 0 part to expose the insulating layer 11, as shown in FIG. 2(e), a divided fund corresponding to the inner wall of the through hole lv8 which was divided into the previous TD and a signal extracted from the divided land. A mesh resist 7 is applied to a portion excluding patterns 14 to 17 and a predetermined wiring pattern 6 by a screen printing method or a photoresin method.

第2図(0は電気メツキ法によりランド5と、RiJ記
分副分割ランド引き出す信号パターン14〜17および
配線パターン6を形成したものであり、第2図(2)お
よび(9)はメツキレシスト7の除去およびエツチング
により導電層8および鋼箔12を除去する工程を示し従
来の工程と同様である。
Fig. 2 (0 shows the land 5, the signal patterns 14 to 17 for drawing out the RiJ marked subdivided lands, and the wiring pattern 6 formed by the electroplating method; The process of removing the conductive layer 8 and the steel foil 12 by removing and etching is similar to the conventional process.

なお、本実施例ではスルーホー/L/8の分1111数
4個について説明したが、目的に応じ2個、8個その池
複数であっても構わず、また分割スルーホー〜8は多層
印刷配線板の各層にも適用が可能である。
In addition, in this embodiment, the number of through holes/L/8 1111 is 4, but depending on the purpose, 2 or 8 holes may be used. It can also be applied to each layer.

(7)発明の効果 以上の説明から明らかなように、本発明に係る印刷配線
板の製造法によれば、従来のスルーホー/I/にくらべ
複数に分割したスルーホールを適用したことにより従来
信号パターンが1本でめったものが、複数信号の接続を
aJ、Ilとし、ジャンパー線等が不要となるので信頼
性の向とが期待できるとともに高密度実装の印刷配線板
の提供が可能となる。
(7) Effects of the Invention As is clear from the above explanation, according to the method of manufacturing a printed wiring board according to the present invention, by applying a through hole divided into a plurality of parts compared to the conventional through hole /I/, the conventional through hole Although a single pattern is rarely used, multiple signals can be connected by aJ and Il, and jumper wires and the like are not required, so reliability can be expected to be improved and a printed wiring board with high density packaging can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(2)は従来の印刷配線板の製造法の工
程を説明するための平面図および側断面図、第2図(a
)〜(5)は本発明に係る印刷配線板の製造法の製造工
程の一実施例を説明するための平面図および側断面図で
ある。 図において、lは両面鋼張積層板、2はスルーホール下
孔、8は導電層、4はスルーホール、5はランド、6は
配線パターン、7はメツキレシスト、8は分割スルーホ
ール、9は切込み、11は絶縁層、12は銅箔、18〜
17はランド引出し信号パターン、を示す。 第1WJ 第11!I
Figures 1 (a) to (2) are a plan view and side sectional view for explaining the steps of a conventional printed wiring board manufacturing method, and Figure 2 (a)
) to (5) are a plan view and a side sectional view for explaining one embodiment of the manufacturing process of the printed wiring board manufacturing method according to the present invention. In the figure, l is a double-sided steel clad laminate, 2 is a through-hole prepared hole, 8 is a conductive layer, 4 is a through hole, 5 is a land, 6 is a wiring pattern, 7 is a mesh resist, 8 is a divided through hole, and 9 is a notch. , 11 is an insulating layer, 12 is a copper foil, 18-
17 shows a land extraction signal pattern. 1st WJ 11th! I

Claims (1)

【特許請求の範囲】[Claims] 両面銅張積層仮に複数のスルーホー〃と、鋏ス〜−ホー
ルに対応するランドを形成してなる印刷配線板の製造法
において、前記両面鋼張積層板にスルーホールの下孔を
穿孔し、該下孔の内−に化学メッキにより導電層を形成
した前記スルーホールの孔方向に沿った内壁が相互に絶
縁されるよう複数に分割し、該分割され九ス〃−ホール
の内壁に対応するランドを形成したことを特徴とする印
刷配線板の製造法。
In a method for manufacturing a double-sided copper-clad laminate in which a plurality of through-holes and lands corresponding to the holes are formed, pilot holes for through-holes are drilled in the double-sided steel-clad laminate, and A conductive layer is formed in the pilot hole by chemical plating, and the inner wall along the hole direction of the through hole is divided into a plurality of parts so as to be mutually insulated, and a land corresponding to the inner wall of the nine divided holes is formed. A method for manufacturing a printed wiring board, characterized in that a printed wiring board is formed.
JP21174381A 1981-12-23 1981-12-23 Method of producing printed circuit board Pending JPS58110094A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21174381A JPS58110094A (en) 1981-12-23 1981-12-23 Method of producing printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21174381A JPS58110094A (en) 1981-12-23 1981-12-23 Method of producing printed circuit board

Publications (1)

Publication Number Publication Date
JPS58110094A true JPS58110094A (en) 1983-06-30

Family

ID=16610845

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21174381A Pending JPS58110094A (en) 1981-12-23 1981-12-23 Method of producing printed circuit board

Country Status (1)

Country Link
JP (1) JPS58110094A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7842611B2 (en) 2008-01-15 2010-11-30 Panasonic Corporation Substrate and manufacturing method of the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7842611B2 (en) 2008-01-15 2010-11-30 Panasonic Corporation Substrate and manufacturing method of the same

Similar Documents

Publication Publication Date Title
JPH08204338A (en) Multilayer printed circuit board
JPS59175796A (en) Method of producing multilayer printed circuit board
JPS58110094A (en) Method of producing printed circuit board
JP2000216513A (en) Wiring board and manufacturing method using the same
KR20210000161A (en) Printed circuit board and manufacturing method the same
JP2005322946A (en) Manufacturing method of printed wiring board and printed wiring board
JPS58132988A (en) Method of producing printed circuit board
JPS5987896A (en) Multilayer printed board
JP2517315B2 (en) Electronic circuit package
CN116634662B (en) High-speed printed circuit board and preparation method thereof
JPS58141594A (en) Method of connecting both sides of printed circuit board
JPS62193197A (en) Manufacture of through-hole printed wiring board
JPS5814626Y2 (en) multilayer printed board
JPS634694A (en) Multilayer printed board
JPS60180186A (en) Printed board
JPS62235795A (en) Printed wiring substrate
JPS60149195A (en) Method of producing printed circuit board
JPS58157189A (en) Method of producing printed circuit board
KR200267934Y1 (en) BGA printed circuit board
JPS63153894A (en) Multilayer printed interconnection board
GB2207558A (en) Perforated printed circuit boards
JPS60130883A (en) Multilayer printed circuit board
JPS58216495A (en) Printed circuit board
JPS5913397A (en) Method of extending and altering circuit of multilayer board
JPS6076185A (en) Printed plate