JPS5913397A - Method of extending and altering circuit of multilayer board - Google Patents

Method of extending and altering circuit of multilayer board

Info

Publication number
JPS5913397A
JPS5913397A JP12187482A JP12187482A JPS5913397A JP S5913397 A JPS5913397 A JP S5913397A JP 12187482 A JP12187482 A JP 12187482A JP 12187482 A JP12187482 A JP 12187482A JP S5913397 A JPS5913397 A JP S5913397A
Authority
JP
Japan
Prior art keywords
circuit
multilayer board
expansion
wiring
circuit pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12187482A
Other languages
Japanese (ja)
Inventor
拓也 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP12187482A priority Critical patent/JPS5913397A/en
Publication of JPS5913397A publication Critical patent/JPS5913397A/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 り発明の技術分野j 本発明は多層基板の回路拡張・変更り法に関する。[Detailed description of the invention] Technical field of invention The present invention relates to a method for expanding and modifying circuits of multilayer boards.

1光明の技術的背景] 従来より、回路パターンの形成された配線用プリン1一
基板の檜数枚を積層し、各層に形成された回路パターン
を用いて高密度配線を行うようにした多層基板が知られ
ている。
1. Technical background of Komei] Conventionally, a multilayer board is made by laminating several cypress boards with circuit patterns formed on them and performing high-density wiring using the circuit patterns formed on each layer. It has been known.

この場合、各配線用プリント基板−Lに形成された回路
パターン間の接続は、配線用プリント基椴の回路パター
ンを貫通して形成したスルーホールにメタライズ層を形
成させることによって行われている。
In this case, the connection between the circuit patterns formed on each wiring printed circuit board-L is performed by forming a metallized layer in a through hole formed by penetrating the circuit pattern of the wiring printed circuit board.

そしで、このような多層基板においで回路変更や拡張を
行なう場合、従来は各配線用プリン1へ基板の回路パタ
ーンのレイアウトそのものを変更づるか、あるいは各回
路パターン間をジャンパー線等により新たに結線するこ
とが行われている。
Therefore, when changing or expanding the circuits on such a multilayer board, the conventional method is to change the layout of the circuit pattern itself on each wiring print 1, or to connect new circuit patterns with jumper wires etc. between each circuit pattern. Wiring is being done.

[背景技術の問題点] しかしながら、上記した多層基板の回路拡張・変更方法
においては次のような問題点がある。
[Problems of Background Art] However, the above-described method for expanding and changing the circuit of a multilayer board has the following problems.

すなわち、各配線用プリント基板の回路パターンのレイ
アラt・を変更する場合には、新たな基板を作成するの
と同様な時間および費用を要しコスト高となるし、また
ジャンパー線等で接続づる場合には多層基板表面の回路
パターン間の接続は容易であるが、多層基板の表面に出
ていない内層の回路パターン間の接続を行なうことは不
可能ぐある。
In other words, when changing the layout of the circuit pattern of each wiring printed circuit board, it takes the same amount of time and money as creating a new board, resulting in high costs. In some cases, it is easy to connect circuit patterns on the surface of a multilayer substrate, but it is impossible to connect circuit patterns on inner layers that do not appear on the surface of the multilayer substrate.

[発明の目的] 本発明は以上述べた従来の多層基板における回路拡張・
変更時の欠点を解消づることを目的としてなされたもの
で、回路パターンのレイアラ1〜変更やジVンパー線等
による回路パターン間の接続を必要どせずに、内層プリ
ント基板間の接続をも容易に可能にした多層基板の回路
拡張・変更方法を提供するものである。
[Object of the Invention] The present invention is directed to circuit expansion and
This was done with the aim of eliminating the drawbacks when changing circuit patterns, and it also makes it easy to connect inner layer printed circuit boards without changing the circuit pattern or connecting between circuit patterns using jumper wires etc. The present invention provides a method for expanding and changing the circuit of a multilayer board.

し発明の概要1 本発明の多層基板の回路拡張・変更方法は、配線用プリ
ン!・基板の複数枚を積層しCなる多層基板の少くとも
二枚の配線用プリント基板十の互いに重なり合う位置に
拡張・変更用回路パターンを形成してJ3き、その多層
基板の少くとも−hの面から、上記拡張・変更用回路パ
ターン間の絶縁層を貫通しく接続孔を穿設するとともに
、この接続孔内に硬化性導電樹脂組成物を注入し固化け
しめて」ニ記拡張・変更用回路パターン間を導通ざVる
ことを特徴としCいる。
Summary of the Invention 1 The method for expanding and changing the circuit of a multilayer board according to the present invention is a wiring print!・A circuit pattern for expansion/change is formed at the mutually overlapping position of at least two wiring printed circuit boards 10 of a multilayer board C by laminating a plurality of boards, and at least -h of the multilayer board J3 is formed. A connection hole is bored through the insulating layer between the circuit patterns for expansion and modification from the surface, and a curable conductive resin composition is injected into the connection hole and hardened to form a circuit for expansion and modification. It is characterized by the fact that there is no conduction between the patterns.

「発明の実施例」 以下本発明の詳細を図面に示す一実施例について説明覆
る。
"Embodiment of the Invention" The details of the present invention will be explained below with reference to an embodiment shown in the drawings.

第1図および第2図は本発明の詳細な説明するための多
層基板の断面図である。
1 and 2 are cross-sectional views of a multilayer substrate for explaining the present invention in detail.

まず、電子回路を構成する所定の回路パターン(図示省
略)を形成した配線用プリント基板たる絶縁層2.3.
4の積層された多層基板1を用意する。この多層基板1
を構成する絶縁層2.3.4上には、上記所定の回路パ
ターンとは別の回路拡張・変更用回路パターン2a 、
 3a 、4.aがそれぞれ形成されCいる。
First, an insulating layer 2.3, which is a printed circuit board for wiring, on which a predetermined circuit pattern (not shown) forming an electronic circuit is formed.
A multilayer substrate 1 in which four layers are stacked is prepared. This multilayer board 1
On the insulating layer 2.3.4 constituting the circuit, there is a circuit pattern 2a for circuit extension/change, which is different from the above-mentioned predetermined circuit pattern.
3a, 4. A and C are formed respectively.

これらの回路拡張・変更用回路パターン2a、3a 、
4aは、所定位置に予め回路拡張及び回路変更の予想さ
れるパターン形状に形成されCいる。
These circuit expansion/change circuit patterns 2a, 3a,
4a is formed in advance at a predetermined position in a pattern shape expected for circuit expansion and circuit modification.

しかして多層基板1に回路の拡張または変更の必要が生
じた場合には、第1図に示づように、回路パターン2a
の所定位置を貫通し、回路パターン3aに達する盲孔5
を穿設づる。
If it becomes necessary to expand or change the circuit on the multilayer board 1, as shown in FIG.
A blind hole 5 passes through a predetermined position and reaches the circuit pattern 3a.
Drill the hole.

次いC第2図に示すように、盲孔5内に例えば導電性上
ポキン樹脂からなる硬化性導電組成物6を注入し固化さ
せ、回路拡張・変更用パターン2a 、3a間を導通さ
ける。
Next, as shown in FIG. 2, a curable conductive composition 6 made of, for example, a conductive resin is injected into the blind hole 5 and solidified to prevent electrical continuity between the circuit expansion/change patterns 2a and 3a.

第3図は、各絶縁層2.3.4のうち内層の各絶縁層3
.4に形成した拡張・変更用回路パターン3b’ 、4
bどうしを導通させる場合を示したもので、絶縁層2.
3.4上に形成した各回路パターン21+、3b、3b
’、4bのうち31)′ と4bを回路拡張・変更用回
路パターンとして用い、これらの回路拡張・変更用パタ
ーン3b ’ 、 4L1間を導通させるために同図に
示すように、盲孔5を絶縁層2.3.4を貫通して穿設
づる。そして第4図に示づように、この盲孔5に硬化性
導電組成6を21人しC固化し、回路パターン3b’ 
と41)を接続Jる。
Figure 3 shows each inner layer 3 of each insulating layer 2.3.4.
.. Expansion/change circuit pattern 3b' formed in 4
This figure shows the case where the insulating layers 2.b and 2.b are electrically connected to each other.
3.4 Each circuit pattern 21+, 3b, 3b formed on
31)' and 4b out of ', 4b are used as a circuit pattern for circuit expansion/change, and in order to conduct between these circuit expansion/change patterns 3b', 4L1, a blind hole 5 is made as shown in the figure. Drill through the insulation layer 2.3.4. Then, as shown in FIG. 4, curable conductive composition 6 is poured into this blind hole 5 by 21 people and solidified, and the circuit pattern 3b'
and 41) are connected.

[発明の効果] 以上説明したように本発明によれば、多層基板を構成η
る各絶縁層に形成される回路パターンを、あうかじ回路
拡張・変更を想定したレイアウトに設計しておき、所定
位置に接続孔を穿設しにの接続孔へ導電性樹脂組成物を
注入、固化させるだけで容易に回路の拡張・変更を行な
うことができるので、従来方法に比較して回路膜81の
時間を短縮し得るとともに安価で経済的Cあり、さらに
内層回路パターン間の変更をも極め′C容易になしif
fる利点を有する。
[Effects of the Invention] As explained above, according to the present invention, the multilayer substrate consists of η
The circuit pattern formed on each insulating layer is designed in a layout that takes into account circuit expansion and modification, and a conductive resin composition is injected into the connection hole by drilling connection holes at predetermined positions. Since the circuit can be easily expanded or changed just by solidifying it, the time required to prepare the circuit film 81 can be shortened compared to the conventional method, and it is inexpensive and economical. Furthermore, it is also possible to change the inner layer circuit pattern. Extreme 'C easy if
It has several advantages.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は本発明の多層基板の回路拡張・変
更方法の一実施例を説明する断面図、第3図および第4
図は他の実施例を説明づる断面図である。 1・・・・・・・・・・・・・・・多層基板2.3.4
・・・絶縁層(配線用プリント基板)2a、2b、3a
、3b’ 、4a ・・・・・・・・・・・・・・・回路拡張・変更用回路
パターン5.7・・・・・・・・・接続孔 6.8・・・・・・・・・硬化性導電組成物代即人弁理
士   須 山 佐 − 第1図 第2図 第3図 第4図
1 and 2 are cross-sectional views for explaining an embodiment of the method for expanding and changing the circuit of a multilayer board according to the present invention, and FIGS.
The figure is a sectional view illustrating another embodiment. 1・・・・・・・・・・・・Multilayer board 2.3.4
...Insulating layer (printed circuit board for wiring) 2a, 2b, 3a
, 3b', 4a......Circuit pattern for circuit expansion/change 5.7...Connection hole 6.8... ... Curable conductive composition attorney Suyama Sasa - Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 配線用プリント基板の複数枚を積層してなる多層基板の
少くとも二枚の配線用プリント基板上のりいに重なり合
う位置に拡張・変更用回路パターンを形成しておぎ、前
記多層基板の少くとも一方の面から前記拡張・変更用回
路パターン間の絶縁層を貫通して接続孔を穿設するとと
もに、この接続孔内に硬化性導電樹脂組成物を注入し固
化せしめて前記拡張・変更用回路パターン間を導通させ
ることを特徴する多層基板の回路拡張・変更方法。
A multilayer board formed by laminating a plurality of printed circuit boards for wiring has an expansion/change circuit pattern formed at a position overlapping the layers on at least two printed boards for wiring, and at least one side of the multilayer board. A connection hole is drilled through the insulating layer between the circuit patterns for expansion and modification from the surface thereof, and a curable conductive resin composition is injected into the connection hole and solidified to form the circuit pattern for expansion and modification. A method for expanding and changing a circuit of a multilayer board, which is characterized by providing conduction between the circuits.
JP12187482A 1982-07-13 1982-07-13 Method of extending and altering circuit of multilayer board Pending JPS5913397A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12187482A JPS5913397A (en) 1982-07-13 1982-07-13 Method of extending and altering circuit of multilayer board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12187482A JPS5913397A (en) 1982-07-13 1982-07-13 Method of extending and altering circuit of multilayer board

Publications (1)

Publication Number Publication Date
JPS5913397A true JPS5913397A (en) 1984-01-24

Family

ID=14822059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12187482A Pending JPS5913397A (en) 1982-07-13 1982-07-13 Method of extending and altering circuit of multilayer board

Country Status (1)

Country Link
JP (1) JPS5913397A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5079065A (en) * 1990-04-02 1992-01-07 Fuji Xerox Co., Ltd. Printed-circuit substrate and method of making thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5079065A (en) * 1990-04-02 1992-01-07 Fuji Xerox Co., Ltd. Printed-circuit substrate and method of making thereof

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