JPS5896768A - 不輝発性半導体メモリ - Google Patents

不輝発性半導体メモリ

Info

Publication number
JPS5896768A
JPS5896768A JP56194774A JP19477481A JPS5896768A JP S5896768 A JPS5896768 A JP S5896768A JP 56194774 A JP56194774 A JP 56194774A JP 19477481 A JP19477481 A JP 19477481A JP S5896768 A JPS5896768 A JP S5896768A
Authority
JP
Japan
Prior art keywords
channel width
memory cell
memory
fet
load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56194774A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0334665B2 (enExample
Inventor
Hiroshi Iwahashi
岩橋　弘
Masamichi Asano
正通 浅野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56194774A priority Critical patent/JPS5896768A/ja
Publication of JPS5896768A publication Critical patent/JPS5896768A/ja
Publication of JPH0334665B2 publication Critical patent/JPH0334665B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP56194774A 1981-12-03 1981-12-03 不輝発性半導体メモリ Granted JPS5896768A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56194774A JPS5896768A (ja) 1981-12-03 1981-12-03 不輝発性半導体メモリ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56194774A JPS5896768A (ja) 1981-12-03 1981-12-03 不輝発性半導体メモリ

Publications (2)

Publication Number Publication Date
JPS5896768A true JPS5896768A (ja) 1983-06-08
JPH0334665B2 JPH0334665B2 (enExample) 1991-05-23

Family

ID=16330018

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56194774A Granted JPS5896768A (ja) 1981-12-03 1981-12-03 不輝発性半導体メモリ

Country Status (1)

Country Link
JP (1) JPS5896768A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6216264U (enExample) * 1985-07-16 1987-01-30
US5126808A (en) * 1989-10-23 1992-06-30 Advanced Micro Devices, Inc. Flash EEPROM array with paged erase architecture

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5138938A (enExample) * 1974-09-30 1976-03-31 Nippon Electric Co
JPS5182585A (enExample) * 1974-05-11 1976-07-20 Nippon Electric Co

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5182585A (enExample) * 1974-05-11 1976-07-20 Nippon Electric Co
JPS5138938A (enExample) * 1974-09-30 1976-03-31 Nippon Electric Co

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6216264U (enExample) * 1985-07-16 1987-01-30
US5126808A (en) * 1989-10-23 1992-06-30 Advanced Micro Devices, Inc. Flash EEPROM array with paged erase architecture

Also Published As

Publication number Publication date
JPH0334665B2 (enExample) 1991-05-23

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