JPS5893222A - Preparation of semiconductor single crystal film - Google Patents

Preparation of semiconductor single crystal film

Info

Publication number
JPS5893222A
JPS5893222A JP19063081A JP19063081A JPS5893222A JP S5893222 A JPS5893222 A JP S5893222A JP 19063081 A JP19063081 A JP 19063081A JP 19063081 A JP19063081 A JP 19063081A JP S5893222 A JPS5893222 A JP S5893222A
Authority
JP
Japan
Prior art keywords
film
aperture
single crystal
silicon film
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19063081A
Other languages
Japanese (ja)
Other versions
JPH0332208B2 (en
Inventor
Tomoyasu Inoue
井上 知泰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP19063081A priority Critical patent/JPS5893222A/en
Publication of JPS5893222A publication Critical patent/JPS5893222A/en
Publication of JPH0332208B2 publication Critical patent/JPH0332208B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02491Conductive materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To make easy the lateral growth of epitaxial crystal and form a semiconductor single crystal film by depositing a metal or matal silicide at an aperture on an insulating film, depositing a polycrystal or amorphous semiconductor film thereon the thereafter irradiating a laser beam thereto. CONSTITUTION:An SiO2 film 2 is fomed on an Si substrate 1 by the general process, and an aperture is formed after removing a film 2 from the area where will be seed-crystallized. Then, a cobalt film 5 is vacuum-deposited in the specified thickness and the film 5 is removed from the area other than the aperture. Thereafter, a polycrystalline silicon film 3 is deposited by the CVD method under a reduced pressure. The silicon film 3 is annealed by irradiating electron beams or laser beams 4 on said silicon film 3. The silicon film 3 is easily single- crystallized through lateral epitaxial growth from the aperture.

Description

【発明の詳細な説明】 発明の属する技術分野 本発明は多層半導体素子の製造方法に係わり、特に下地
結晶部から上部半導体ノーへのエピタキシャル結晶成長
技術に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a multilayer semiconductor device, and more particularly to a technique for epitaxial crystal growth from an underlying crystal portion to an upper semiconductor layer.

従来技術とその問題点 周知のように、半導体基板上に形成する半導体装置、特
に集積回路素子においては、酸化、拡散イオン注入、C
vD、写真蝕刻等の公知の技術を用いて、基板上に二次
元的に素子を配列させるものであった。そのため従来の
技術を用いて、半導体装置を高集積化、高速化する事に
は限界がある。
Prior Art and its Problems As is well known, semiconductor devices, especially integrated circuit elements, formed on a semiconductor substrate require oxidation, diffusion ion implantation, C
Devices were two-dimensionally arranged on a substrate using known techniques such as vD and photolithography. Therefore, there are limits to increasing the integration and speed of semiconductor devices using conventional techniques.

この限界を打破する方法として素子を多1−に積み重ね
る、所謂三次元果m lal路が提案されてお・りそれ
を実現させるだめの基板材料として絶縁膜上の多結晶シ
リコンまたは非晶質シリコンI―を、V −ブー光や電
子ビーム等のエネルギービーム照射により、粗大結晶粒
化または単結晶化し、それを積層するものが有望視され
ている。
As a way to overcome this limit, a so-called three-dimensional multi-layer stacking of devices has been proposed, and polycrystalline silicon or amorphous silicon on an insulating film is used as the substrate material to realize this. A method in which I- is made into coarse crystal grains or single crystal by irradiation with an energy beam such as V-boo light or an electron beam, and then laminated is considered to be promising.

多層半導体素子に用いる基板材料の製造方゛法は現在名
に幾つか提案されているが、その中で最も有望視されて
いるものにIJ)8S法(Latera Wpi ta
xyby 5eeded 5olid百1cat io
n ) カアル、。
There are currently several proposed methods for manufacturing substrate materials used in multilayer semiconductor devices, but the most promising method is the IJ)8S method (Latera Wpita).
xyby 5eeded 5olid101catio
n) Kaal.

LP01法は第1図に示す様に、シリコン基板(1)ヒ
の絶縁膜(2)の一部を開孔し、その上に多結晶または
非晶質シリコン膜を堆積し、連続ビームのレーザー光ま
たは゛−子線を照射して、上記開口部で−F地地軸結晶
シリコン基板の接触部を種結晶として、そこから横方向
に結晶成長させる。この、場合開孔ff1iから最大約
100μm程度、単結晶領域(3)が伸びて行く。この
方法の特長は前記、種結晶部分の位11の定め方により
単結晶領域を基板面内の希望する場所に作り得る事にあ
り、半導体素子を必らず単結晶領域のFに形成で角る事
である。
As shown in Figure 1, in the LP01 method, a hole is formed in a part of the silicon substrate (1) and an insulating film (2), a polycrystalline or amorphous silicon film is deposited on the hole, and a continuous beam laser is applied. By irradiating with light or an electron beam, crystals are grown in the lateral direction from the contact portion of the -F geocrystalline silicon substrate at the opening as a seed crystal. In this case, the single crystal region (3) extends by about 100 μm at most from the opening ff1i. The advantage of this method is that a single crystal region can be formed at a desired location within the substrate plane by determining the seed crystal portion at position 11, as described above, and the semiconductor element can be formed at the F of the single crystal region, making it possible to form a single crystal region at a corner. It is a matter of

LESS法による結晶膜成長を行なう場合、絶縁膜上の
シリコン族と、開口部のシリコン基板上のシリコン族で
はそれらの下地材質の熱伝導度や、エネルギービームの
反射、干渉、等の違いにより加熱状態が異なるため、シ
リコン膜全体に対して結晶成長に最適な状態を作り出す
事が難がしい。
When growing a crystal film using the LESS method, the silicon group on the insulating film and the silicon group on the silicon substrate in the opening are heated due to differences in the thermal conductivity of their underlying materials, energy beam reflection, interference, etc. Since the conditions are different, it is difficult to create the optimum conditions for crystal growth for the entire silicon film.

レーザービーム照射の場合には下地絶縁膜表面での光の
反射、電子ビーム照射の場合には、下地物質からシリコ
ン膜に戻ってくる後方散乱電子の影響によるものである
。一般に、絶縁膜は、シリコンよりも熱伝導度が低いた
め、絶縁膜上のシリコン族の方がシリコン基板上のシリ
コン膜よりも、温度が上りやすい。このため、開口部の
7リコ/膜に最適な条件で、エネルギービーム全照射l
−だ場合には、絶縁膜上のシリコン膜に対しては照射条
件が強すき゛る事になる。
In the case of laser beam irradiation, this is due to the reflection of light on the surface of the underlying insulating film, and in the case of electron beam irradiation, this is due to the influence of backscattered electrons returning from the underlying material to the silicon film. Generally, an insulating film has lower thermal conductivity than silicon, so the temperature of the silicon group on the insulating film increases more easily than that of the silicon film on the silicon substrate. For this reason, the entire energy beam irradiation l
-, the irradiation conditions will be too strong for the silicon film on the insulating film.

発明の目的 本発明は、この様な点に鑑みてなされたもので容易しこ
エピタキシャル結晶成長させる事を目的とする。
OBJECTS OF THE INVENTION The present invention has been made in view of the above points, and an object of the present invention is to facilitate epitaxial crystal growth.

発明の概要 この発明は、開口部のシリコン基板とその上に堆積する
シリコン膜との間に薄い金属膜或は金属珪化物膜を挿入
して、エピタキシャル結晶成長させるようにしたもので
ある。
SUMMARY OF THE INVENTION In the present invention, a thin metal film or metal silicide film is inserted between the silicon substrate in the opening and the silicon film deposited thereon, thereby allowing epitaxial crystal growth.

発明の効果 本発明によれば、面内温度分布をなだらかとする事がで
き、横方向エピタキシャル結晶成長を容易化した半導体
単結晶膜の製造方法を提供することができる。
Effects of the Invention According to the present invention, it is possible to provide a method for manufacturing a semiconductor single crystal film in which the in-plane temperature distribution can be made gentle and lateral epitaxial crystal growth can be facilitated.

発明の実施例 以F、本発明の実施例全図面を用いながら説明−46o
第2゜本!””IM Eよ、横方向結晶よ長ヶオす@面
図である。まず、シリコン基板(1)の上に通常の工程
によりシリコン酸化g(2)を形成した後、種結晶部と
すべき場所のシリコン酸化膜(2)を写真−剣法により
除去して、開口部を形成する。次に厚さ200大のコバ
ルト膜(5)を真空蒸層法V′こより堆積し、写真蝕刻
法により、開口部以外のコバルト膜を除去する。その上
に、多結晶シリコン膜(3)を減圧CVD法により堆積
させた。シリコン酸化膜(2)と多結晶シリコン膜(,
3)の厚みはそれぞれ、0.5μmと0.3μmである
。次に電子ビームアニールにより表面近傍を加熱して横
方向結晶成長させた。電子ビームの加速電圧はl0KV
、ビーム電流2mA、ビーム径約100μmである。電
子線は表面上を走査速度%Cm / Sの速さでラスタ
ースキャンさせた。
Embodiments of the invention to F, Examples of the invention will be explained using all the drawings-46o
2nd book! ``''IM E, this is a long side view of a lateral crystal. First, a silicon oxide film (2) is formed on a silicon substrate (1) by a normal process, and then the silicon oxide film (2) at the location where the seed crystal is to be formed is removed using a photographic method to form an opening. form. Next, a cobalt film (5) having a thickness of 200 mm is deposited by vacuum evaporation method V', and the cobalt film other than the openings is removed by photolithography. A polycrystalline silicon film (3) was deposited thereon by low pressure CVD. Silicon oxide film (2) and polycrystalline silicon film (,
The thicknesses of 3) are 0.5 μm and 0.3 μm, respectively. Next, the vicinity of the surface was heated by electron beam annealing to cause lateral crystal growth. The accelerating voltage of the electron beam is 10KV
, beam current 2 mA, and beam diameter approximately 100 μm. The electron beam was raster scanned over the surface at a scanning speed of % Cm/S.

この結果、開口部より長さ500μm、幅3011mの
シリコン膜が下地基板と同一の面方位の単結晶膜となっ
た。これは、開口部の多結晶シリコン膜では入射゛電子
ビームによる直接加熱に加えて、下のコバルト層からの
後方散乱電子が加熱に寄与したためシリコン酸化膜上の
多結晶シリコン膜とほぼ同等の温plvcなったため、
面内横方向の温度勾配がゆるやかになったためと考えら
れる。一方、コバルト層の部分は電子ビームアニールに
よりコバルトミリサイドノーが形成された事が、オージ
ェ1子分光法による深さ方向元素分布測定により明らか
吉なった。このため、下地シリコン基板と上部単結晶シ
リコン膜とは、オーム性接触が容易に得られた。
As a result, a silicon film having a length of 500 μm and a width of 3011 m from the opening became a single crystal film having the same plane orientation as the underlying substrate. This is because, in addition to direct heating by the incident electron beam, backscattered electrons from the underlying cobalt layer contributed to the heating of the polycrystalline silicon film at the opening, which resulted in a temperature almost equivalent to that of the polycrystalline silicon film on the silicon oxide film. Because it became PLVC,
This is thought to be due to the temperature gradient in the in-plane lateral direction becoming gentler. On the other hand, it was clearly confirmed by measuring the elemental distribution in the depth direction using Auger single-molecule spectroscopy that cobalt milicide was formed in the cobalt layer by electron beam annealing. Therefore, ohmic contact between the underlying silicon substrate and the upper single crystal silicon film was easily obtained.

本実施例では電子ビームアニール法による単結晶化を示
したが、レーザーアニールでも同等の効果が得られるっ
その場合は界面での光の反射、シリコン膜内での光の多
重反射、干渉等の現象が加熱に寄与する訳である。
In this example, single crystallization by electron beam annealing was shown, but the same effect can be obtained by laser annealing. This phenomenon contributes to heating.

また、本実施例では多結晶シリコン膜の形成に減圧CV
D法を用いたが、超高真空中での蒸着、スパッタリング
、イオンビームデポジシ冒ン等を用いても同等の効果が
得られる。多結晶シリコン膜の下に敷く金属層にコバル
トを用いたが、その他にパラジウム、白金、モリブデン
、タングステン、ニオブ、ニッケル等を用いても良い。
In addition, in this example, low pressure CV was used to form the polycrystalline silicon film.
Although method D was used, the same effect can be obtained by using vapor deposition in an ultra-high vacuum, sputtering, ion beam deposition, or the like. Although cobalt was used for the metal layer placed under the polycrystalline silicon film, other materials such as palladium, platinum, molybdenum, tungsten, niobium, nickel, etc. may also be used.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はLESS法を説明する為の断面図、#T2図は
本発明の詳細な説明する為の断面図である。 (ほか1名) 第1図 第2図
FIG. 1 is a sectional view for explaining the LESS method, and FIG. #T2 is a sectional view for explaining the present invention in detail. (1 other person) Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims] 単結晶半導体基板表面に絶縁膜を被潰し、該絶縁膜の一
部を除去して開口させ、その上・に金属或は金属珪化物
膜を被着し、その上に多結晶或は非晶質の半導体膜を被
着した後、(子ビーム或はレーザー光照射する事により
、上記開口部から横方向にエピタキシャル成長させる事
を特徴とする半導体単結晶膜の製造方法。
An insulating film is crushed on the surface of a single crystal semiconductor substrate, a part of the insulating film is removed to create an opening, a metal or metal silicide film is deposited on top of the insulating film, and a polycrystalline or amorphous film is formed on top of that. A method for manufacturing a semiconductor single crystal film, which comprises depositing a semiconductor film of high quality, and then epitaxially growing it laterally from the opening by irradiating it with a laser beam or a laser beam.
JP19063081A 1981-11-30 1981-11-30 Preparation of semiconductor single crystal film Granted JPS5893222A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19063081A JPS5893222A (en) 1981-11-30 1981-11-30 Preparation of semiconductor single crystal film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19063081A JPS5893222A (en) 1981-11-30 1981-11-30 Preparation of semiconductor single crystal film

Publications (2)

Publication Number Publication Date
JPS5893222A true JPS5893222A (en) 1983-06-02
JPH0332208B2 JPH0332208B2 (en) 1991-05-10

Family

ID=16261259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19063081A Granted JPS5893222A (en) 1981-11-30 1981-11-30 Preparation of semiconductor single crystal film

Country Status (1)

Country Link
JP (1) JPS5893222A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60246620A (en) * 1984-05-22 1985-12-06 Agency Of Ind Science & Technol Manufacture of semiconductor crystal layer
JPS6163018A (en) * 1984-09-04 1986-04-01 Agency Of Ind Science & Technol Manufacture of semiconductor thin film crystal layer
JPS6163017A (en) * 1984-09-04 1986-04-01 Agency Of Ind Science & Technol Manufacture of semiconductor thin film crystal layer
JPS61201414A (en) * 1985-03-02 1986-09-06 Agency Of Ind Science & Technol Manufacture of semiconductor single crystal layer
JPS61234088A (en) * 1985-04-10 1986-10-18 Agency Of Ind Science & Technol Laser light irradiating device
JPH02138725A (en) * 1988-06-28 1990-05-28 Ricoh Co Ltd Semiconductor substrate and manufacture thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51130169A (en) * 1975-05-07 1976-11-12 Nec Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51130169A (en) * 1975-05-07 1976-11-12 Nec Corp Semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60246620A (en) * 1984-05-22 1985-12-06 Agency Of Ind Science & Technol Manufacture of semiconductor crystal layer
JPS6163018A (en) * 1984-09-04 1986-04-01 Agency Of Ind Science & Technol Manufacture of semiconductor thin film crystal layer
JPS6163017A (en) * 1984-09-04 1986-04-01 Agency Of Ind Science & Technol Manufacture of semiconductor thin film crystal layer
JPH0236052B2 (en) * 1984-09-04 1990-08-15 Kogyo Gijutsuin
JPS61201414A (en) * 1985-03-02 1986-09-06 Agency Of Ind Science & Technol Manufacture of semiconductor single crystal layer
JPH0334847B2 (en) * 1985-03-02 1991-05-24 Kogyo Gijutsuin
JPS61234088A (en) * 1985-04-10 1986-10-18 Agency Of Ind Science & Technol Laser light irradiating device
JPH0250838B2 (en) * 1985-04-10 1990-11-05 Kogyo Gijutsuin
JPH02138725A (en) * 1988-06-28 1990-05-28 Ricoh Co Ltd Semiconductor substrate and manufacture thereof

Also Published As

Publication number Publication date
JPH0332208B2 (en) 1991-05-10

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