JPS5890761U - wireless transmitter - Google Patents
wireless transmitterInfo
- Publication number
- JPS5890761U JPS5890761U JP18738781U JP18738781U JPS5890761U JP S5890761 U JPS5890761 U JP S5890761U JP 18738781 U JP18738781 U JP 18738781U JP 18738781 U JP18738781 U JP 18738781U JP S5890761 U JPS5890761 U JP S5890761U
- Authority
- JP
- Japan
- Prior art keywords
- latch circuit
- wireless transmitter
- input
- input signal
- transmitter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
- Small-Scale Networks (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来例の概略構成を示す斜視図、第２図および
第３図は同上の動作説明図、第４図および第５図は本考
案−実施例の要部回路図、第６図乃至第８図は同上の動
作説明図、第９図は受信表示装置のブロック回路図であ
る。
２１〜２８はラッチ回路、３は読出し回路、９は送信部
である。Fig. 1 is a perspective view showing a schematic configuration of a conventional example, Figs. 2 and 3 are explanatory diagrams of the same operation as above, Figs. 4 and 5 are main part circuit diagrams of the present invention-embodiment, and Fig. 6 8 to 8 are explanatory diagrams of the same operation as above, and FIG. 9 is a block circuit diagram of the reception display device. 21 to 28 are latch circuits, 3 is a readout circuit, and 9 is a transmitter.
Claims (1)
いずれかの入力信号入力が得られたときに各ラッチ回路
出力を順次読出す読出し回路と、ラッチ回路から読出さ
れた入力信号に対応する固有コード信号にて搬送波を変
調した互いに識別可能な入力検出信号を順次発信する送
信部とよりなるワイヤレス発信器。a latch circuit that latches each of the plurality of input signals;
A readout circuit that sequentially reads out the output of each latch circuit when any input signal is obtained, and input detection that can be identified from each other by modulating the carrier wave with a unique code signal corresponding to the input signal read out from the latch circuit. A wireless transmitter consisting of a transmitter that sequentially transmits signals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18738781U JPS5890761U (en) | 1981-12-15 | 1981-12-15 | wireless transmitter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18738781U JPS5890761U (en) | 1981-12-15 | 1981-12-15 | wireless transmitter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5890761U true JPS5890761U (en) | 1983-06-20 |
| JPS6320206Y2 JPS6320206Y2 (en) | 1988-06-06 |
Family
ID=29990142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18738781U Granted JPS5890761U (en) | 1981-12-15 | 1981-12-15 | wireless transmitter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5890761U (en) |
-
1981
- 1981-12-15 JP JP18738781U patent/JPS5890761U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6320206Y2 (en) | 1988-06-06 |
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