JPS60121353U - wireless communication device - Google Patents

wireless communication device

Info

Publication number
JPS60121353U
JPS60121353U JP843884U JP843884U JPS60121353U JP S60121353 U JPS60121353 U JP S60121353U JP 843884 U JP843884 U JP 843884U JP 843884 U JP843884 U JP 843884U JP S60121353 U JPS60121353 U JP S60121353U
Authority
JP
Japan
Prior art keywords
wireless communication
communication device
digital data
receiver
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP843884U
Other languages
Japanese (ja)
Inventor
尚 熊谷
等 池田
Original Assignee
松下電工株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 松下電工株式会社 filed Critical 松下電工株式会社
Priority to JP843884U priority Critical patent/JPS60121353U/en
Publication of JPS60121353U publication Critical patent/JPS60121353U/en
Pending legal-status Critical Current

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  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例のブロック回路図、第2図および第3図
は同上の動作説明図、第4図は本考案−実施例0要部回
路図・第5図は他0実施例″ツ回路図である。 1は送信機、2は受信機、7、a、7bは周波数検出回
路、11は誤出力防止回路である。
Fig. 1 is a block circuit diagram of the conventional example, Figs. 2 and 3 are explanatory diagrams of the same operation as above, Fig. 4 is a circuit diagram of the main part of the present invention - Embodiment 0, and Fig. 5 is a diagram of the other 0 embodiments. 1 is a circuit diagram. 1 is a transmitter, 2 is a receiver, 7, a, 7b are frequency detection circuits, and 11 is an erroneous output prevention circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] デジタルデータのriJ、r□Jにそれぞれ対応する2
つの周波数を時系列的に組合せた変調信号にて搬送波を
変調した送信信号が送出される送信機と、該送信信号を
受信復調するとともに2つの周波数をそれぞれ周波数検
出回路にて検出してデ、ジタルデータを再生する受信機
とよりなるワイヤレス通信装置において、画周波数検出
回路出力が同時に得られたとき誤出力と見なしてデジタ
ルデータを出力しないようにする誤出力防止回路を受信
機に設けたことを特徴とするワイヤレス通信装置。
2 corresponding to riJ and r□J of digital data, respectively.
a transmitter that sends out a transmission signal in which a carrier wave is modulated with a modulation signal that is a combination of two frequencies in time series; In a wireless communication device consisting of a receiver that reproduces digital data, the receiver is provided with an erroneous output prevention circuit that treats it as an erroneous output and prevents the output of digital data when image frequency detection circuit outputs are obtained at the same time. A wireless communication device characterized by:
JP843884U 1984-01-25 1984-01-25 wireless communication device Pending JPS60121353U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP843884U JPS60121353U (en) 1984-01-25 1984-01-25 wireless communication device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP843884U JPS60121353U (en) 1984-01-25 1984-01-25 wireless communication device

Publications (1)

Publication Number Publication Date
JPS60121353U true JPS60121353U (en) 1985-08-16

Family

ID=30487721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP843884U Pending JPS60121353U (en) 1984-01-25 1984-01-25 wireless communication device

Country Status (1)

Country Link
JP (1) JPS60121353U (en)

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