JPS60169962U - Transmitter/receiver for digital signal transmission - Google Patents

Transmitter/receiver for digital signal transmission

Info

Publication number
JPS60169962U
JPS60169962U JP5753484U JP5753484U JPS60169962U JP S60169962 U JPS60169962 U JP S60169962U JP 5753484 U JP5753484 U JP 5753484U JP 5753484 U JP5753484 U JP 5753484U JP S60169962 U JPS60169962 U JP S60169962U
Authority
JP
Japan
Prior art keywords
signal
point group
signal point
transmitter
quadrature modulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5753484U
Other languages
Japanese (ja)
Other versions
JPH0543554Y2 (en
Inventor
芳彦 赤岩
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP5753484U priority Critical patent/JPS60169962U/en
Priority to AU41074/85A priority patent/AU589119B2/en
Priority to US06/722,256 priority patent/US4817116A/en
Priority to NO85851489A priority patent/NO169269C/en
Priority to CA000479247A priority patent/CA1236168A/en
Priority to SE8501861A priority patent/SE460326B/en
Priority to FI851513A priority patent/FI80175C/en
Publication of JPS60169962U publication Critical patent/JPS60169962U/en
Application granted granted Critical
Publication of JPH0543554Y2 publication Critical patent/JPH0543554Y2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図および第２図はそれぞれ本考案の送受信機におけ
る送信機と受信機の構成を示すブロック図、第３図およ
び第５図はそれぞれ本考案の送信機における直交変調器
の第１および第２の実施例に対する信号点配置および軌
跡を示す複素振幅平面図、第４図は本考案の送信機にお
ける直交変調器の第２の実施例を示すブロック図である
。これらの図において、１２０は直交変調器、１２１゜
１２２．４３１，４３２，４３３．４３４は低域通過フ
ィルタ、１３１，１３２，４４１，４４２．４４３，４
４４はミクサ、１４０，４５０は局部発振器、１４５，
４５５は位相差分離回路、１３５．４６０は加算回路、
１６０は増幅器、１７０．２１０はアンテナ、２２０は
帯域通過フィルタ、２３０は振幅制限回路、２４０は復
調器である。1 and 2 are block diagrams showing the configurations of a transmitter and a receiver in the transceiver of the present invention, respectively. FIG. 4 is a block diagram showing the second embodiment of the orthogonal modulator in the transmitter of the present invention. In these figures, 120 is a quadrature modulator, 121° 122.431, 432, 433.434 is a low-pass filter, 131, 132, 441, 442.443, 4
44 is a mixer, 140, 450 is a local oscillator, 145,
455 is a phase difference separation circuit, 135.460 is an addition circuit,
160 is an amplifier, 170, 210 is an antenna, 220 is a band pass filter, 230 is an amplitude limiting circuit, and 240 is a demodulator.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 送信ディジタル信号を変調入力とする直交変調器であっ
て、複素振幅平面上で規定される信号点を位相の順番に
並べて、前記位相について順次１個おきに取って得られ
る信号点の全体を第１の信号点グループとし、残りの信
号点の全体を第２の信号点グループとし前記第１の信号
点グループと前記第２の信号点グループのなかの前記送
信ディジタル信号に対応する１つの信号点を時間的に交
互に選択する直交変調器と、前記直交変調器の出力信号
をほぼ線形に増幅する増幅器とから少なくとも構成され
る送信機と、該送信機からの送信信号を受信入力とし、
前記受信入力を帯域制限する手段と、該帯域制限する手
段より供給される信号を振幅制限する手段と、該振幅制
限する手段の出力が供給される復調器とから少なくとも
構成される受信機とからなることを特徴とするディジタ
ル信号伝送用送受信機。A quadrature modulator that uses a transmitted digital signal as a modulation input, in which signal points defined on a complex amplitude plane are arranged in order of phase, and the entire signal points obtained by sequentially taking every other signal point with respect to the phase are One signal point group is defined as one signal point group, and all of the remaining signal points are defined as a second signal point group, and one signal point corresponding to the transmitted digital signal among the first signal point group and the second signal point group is defined as one signal point group. a transmitter comprising at least a quadrature modulator that temporally alternately selects the output signal of the quadrature modulator, and an amplifier that substantially linearly amplifies the output signal of the quadrature modulator, and a transmitting signal from the transmitter as a receiving input,
a receiver comprising at least means for band-limiting the received input, means for amplitude-limiting a signal supplied from the band-limiting means, and a demodulator to which the output of the amplitude-limiting means is supplied; A transceiver for digital signal transmission characterized by:
JP5753484U 1984-04-17 1984-04-19 Transmitter/receiver for digital signal transmission Granted JPS60169962U (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP5753484U JPS60169962U (en) 1984-04-19 1984-04-19 Transmitter/receiver for digital signal transmission
AU41074/85A AU589119B2 (en) 1984-04-17 1985-04-12 Digital radio communication system utilizing quadrature modulated carrier waves
US06/722,256 US4817116A (en) 1984-04-17 1985-04-12 Digital radio communication system utilizing quadrature modulated carrier waves
NO85851489A NO169269C (en) 1984-04-17 1985-04-15 DIGITAL RADIO COMMUNICATION SYSTEM
CA000479247A CA1236168A (en) 1984-04-17 1985-04-16 Digital radio communication system utilizing quadrature modulated carrier waves
SE8501861A SE460326B (en) 1984-04-17 1985-04-16 DIGITAL RADIO COMMUNICATION SYSTEM USING QUADRATURE-MODULATED EMERGENCIES
FI851513A FI80175C (en) 1984-04-17 1985-04-16 Digital telecommunication system where quadrature modulated carrier signals are used

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5753484U JPS60169962U (en) 1984-04-19 1984-04-19 Transmitter/receiver for digital signal transmission

Publications (2)

Publication Number Publication Date
JPS60169962U true JPS60169962U (en) 1985-11-11
JPH0543554Y2 JPH0543554Y2 (en) 1993-11-02

Family

ID=30582155

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5753484U Granted JPS60169962U (en) 1984-04-17 1984-04-19 Transmitter/receiver for digital signal transmission

Country Status (1)

Country Link
JP (1) JPS60169962U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5270738A (en) * 1975-12-09 1977-06-13 Mitsubishi Electric Corp 2-phase psk transmitter
JPS5637756A (en) * 1979-09-05 1981-04-11 Nec Corp Transmitting device for time-division multiple connection system
JPS57184356A (en) * 1981-05-08 1982-11-13 Seiko Epson Corp Fsk demodulating circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5270738A (en) * 1975-12-09 1977-06-13 Mitsubishi Electric Corp 2-phase psk transmitter
JPS5637756A (en) * 1979-09-05 1981-04-11 Nec Corp Transmitting device for time-division multiple connection system
JPS57184356A (en) * 1981-05-08 1982-11-13 Seiko Epson Corp Fsk demodulating circuit

Also Published As

Publication number Publication date
JPH0543554Y2 (en) 1993-11-02

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