JPS59108950U - Portable computer data transfer device - Google Patents

Portable computer data transfer device

Info

Publication number
JPS59108950U
JPS59108950U JP144083U JP144083U JPS59108950U JP S59108950 U JPS59108950 U JP S59108950U JP 144083 U JP144083 U JP 144083U JP 144083 U JP144083 U JP 144083U JP S59108950 U JPS59108950 U JP S59108950U
Authority
JP
Japan
Prior art keywords
data
transfer device
portable computer
data transfer
computer data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP144083U
Other languages
Japanese (ja)
Inventor
堀内　征治
堀内　泰輔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP144083U priority Critical patent/JPS59108950U/en
Publication of JPS59108950U publication Critical patent/JPS59108950U/en
Pending legal-status Critical Current

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  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はこの考案に於ける構成側図、第２図は携帯用計
算機の実施構成側図、第３図はこの考案に於ける回路構
成図、第４図は伝送信号の各部の波形図であり対応符号
ａ、　ｂ、　　ｃにより示してい−る。 １は携帯用計算機、９はコネクター、１５は制御装置、
１６はホスト計算機。Figure 1 is a side view of the configuration of this invention, Figure 2 is a side view of the implementation configuration of a portable computer, Figure 3 is a circuit diagram of this invention, and Figure 4 is a waveform diagram of each part of the transmission signal. and are indicated by corresponding symbols a, b, and c. 1 is a portable computer, 9 is a connector, 15 is a control device,
16 is a host computer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電源を内蔵した複数の携帯用計算機に記憶されたデータ
の符号゛１″、および“０゛を各々の個別の周波数の信
号に置換して得られるＦＳＸ変調信号を周波数弁別器に
より復調し、直列化されたデータ信号を並列化して制御
装置に出力させ、制御装置ではいったんこれらのデータ
を処理したのちインターフェイスを介してホスト計算機
に転送書き込ませるようにして成る携帯用計算機のデー
タ転送装置。A frequency discriminator demodulates the FSX modulated signal obtained by replacing the codes "1" and "0" of data stored in multiple portable computers with built-in power supplies with signals of respective individual frequencies. A data transfer device for a portable computer, in which parallelized data signals are output to a control device, the control device processes the data, and then transfers and writes the data to a host computer via an interface.
JP144083U 1983-01-10 1983-01-10 Portable computer data transfer device Pending JPS59108950U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP144083U JPS59108950U (en) 1983-01-10 1983-01-10 Portable computer data transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP144083U JPS59108950U (en) 1983-01-10 1983-01-10 Portable computer data transfer device

Publications (1)

Publication Number Publication Date
JPS59108950U true JPS59108950U (en) 1984-07-23

Family

ID=30133165

Family Applications (1)

Application Number Title Priority Date Filing Date
JP144083U Pending JPS59108950U (en) 1983-01-10 1983-01-10 Portable computer data transfer device

Country Status (1)

Country Link
JP (1) JPS59108950U (en)

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