JPS582037U - Reset signal transmission circuit - Google Patents

Reset signal transmission circuit

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Publication number
JPS582037U
JPS582037U JP9627681U JP9627681U JPS582037U JP S582037 U JPS582037 U JP S582037U JP 9627681 U JP9627681 U JP 9627681U JP 9627681 U JP9627681 U JP 9627681U JP S582037 U JPS582037 U JP S582037U
Authority
JP
Japan
Prior art keywords
reset signal
reset
signal transmission
transmission circuit
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9627681U
Other languages
Japanese (ja)
Inventor
犬山　聖二
浩 井口
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP9627681U priority Critical patent/JPS582037U/en
Publication of JPS582037U publication Critical patent/JPS582037U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は回路図、第２図はタイトチャート図であって、
１は処理装置、２はレジスタ、３はＮＯＲ回路、４はカ
ウンタである。Figure 1 is a circuit diagram, Figure 2 is a tight chart diagram,
1 is a processing device, 2 is a register, 3 is a NOR circuit, and 4 is a counter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロプロセッサを備えた処理装置のリセット回路で
あって、リセット要求信号をセットするレジスタとリセ
ット信号を発信するカウンタを設け、該処理装置への入
力信号又は該レジスタの出力信号を該カウンタに入力し
、該リセット信号を継続発信する回路構成になる事を特
徴とするリセット信号発信回路。A reset circuit for a processing device equipped with a microprocessor, which includes a register for setting a reset request signal and a counter for emitting the reset signal, and inputs an input signal to the processing device or an output signal from the register to the counter. , a reset signal transmitting circuit characterized in that it has a circuit configuration that continuously transmits the reset signal.
JP9627681U 1981-06-29 1981-06-29 Reset signal transmission circuit Pending JPS582037U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9627681U JPS582037U (en) 1981-06-29 1981-06-29 Reset signal transmission circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9627681U JPS582037U (en) 1981-06-29 1981-06-29 Reset signal transmission circuit

Publications (1)

Publication Number Publication Date
JPS582037U true JPS582037U (en) 1983-01-07

Family

ID=29891147

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9627681U Pending JPS582037U (en) 1981-06-29 1981-06-29 Reset signal transmission circuit

Country Status (1)

Country Link
JP (1) JPS582037U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412253A (en) * 1977-06-28 1979-01-29 Citizen Watch Co Ltd Setting device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5412253A (en) * 1977-06-28 1979-01-29 Citizen Watch Co Ltd Setting device

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