JPS5887628A - エンコ−ダ回路 - Google Patents

エンコ−ダ回路

Info

Publication number
JPS5887628A
JPS5887628A JP18516181A JP18516181A JPS5887628A JP S5887628 A JPS5887628 A JP S5887628A JP 18516181 A JP18516181 A JP 18516181A JP 18516181 A JP18516181 A JP 18516181A JP S5887628 A JPS5887628 A JP S5887628A
Authority
JP
Japan
Prior art keywords
circuit
digit
output
outputs
digits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18516181A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6126088B2 (enrdf_load_stackoverflow
Inventor
Yoshitake Suzuki
義武 鈴木
Hiroki Yamauchi
寛紀 山内
Atsushi Iwata
穆 岩田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP18516181A priority Critical patent/JPS5887628A/ja
Publication of JPS5887628A publication Critical patent/JPS5887628A/ja
Publication of JPS6126088B2 publication Critical patent/JPS6126088B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
JP18516181A 1981-11-20 1981-11-20 エンコ−ダ回路 Granted JPS5887628A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18516181A JPS5887628A (ja) 1981-11-20 1981-11-20 エンコ−ダ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18516181A JPS5887628A (ja) 1981-11-20 1981-11-20 エンコ−ダ回路

Publications (2)

Publication Number Publication Date
JPS5887628A true JPS5887628A (ja) 1983-05-25
JPS6126088B2 JPS6126088B2 (enrdf_load_stackoverflow) 1986-06-19

Family

ID=16165893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18516181A Granted JPS5887628A (ja) 1981-11-20 1981-11-20 エンコ−ダ回路

Country Status (1)

Country Link
JP (1) JPS5887628A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59216245A (ja) * 1983-05-25 1984-12-06 Nec Corp 正規化回路
JPS6019237A (ja) * 1983-07-13 1985-01-31 Nec Corp 正規化回路
JPS60167027A (ja) * 1984-02-08 1985-08-30 Fujitsu Ltd デイジタル信号処理用演算回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59216245A (ja) * 1983-05-25 1984-12-06 Nec Corp 正規化回路
JPS6019237A (ja) * 1983-07-13 1985-01-31 Nec Corp 正規化回路
JPS60167027A (ja) * 1984-02-08 1985-08-30 Fujitsu Ltd デイジタル信号処理用演算回路

Also Published As

Publication number Publication date
JPS6126088B2 (enrdf_load_stackoverflow) 1986-06-19

Similar Documents

Publication Publication Date Title
JPS60219675A (ja) 時間軸変換回路
US4748584A (en) Parallel multiplier utilizing Booth's algorithm
US5671166A (en) Barrel shifter for combining pieces of data into a piece of combined data and shifting the combined data
JPS5864844A (ja) 同期検出方式
JPS5887628A (ja) エンコ−ダ回路
US4224680A (en) Parity prediction circuit for adder/counter
US5142490A (en) Multiplication circuit with storing means
JP2766133B2 (ja) パラレル・シリアル・データ変換回路
JPS5899836A (ja) エンコ−ダ回路
KR20040045292A (ko) 고속 가산기
JPH11102284A (ja) 選別方法および選別回路
JP3535670B2 (ja) 浮動小数点数の仮数正規化回路
SU1171779A1 (ru) Устройство дл определени экстремального из @ чисел
SU1198509A1 (ru) Устройство дл ранжировани чисел
JPH04257024A (ja) 開平器
SU1252778A2 (ru) Устройство дл определени старшего значащего разр да
JPS5849920B2 (ja) デ−タデンソウホウシキ
KR0147433B1 (ko) 병렬식 리딩-원 검출장치
JPH04245718A (ja) ベクトル量子化方式
SU1520512A1 (ru) Матричное устройство дл возведени в квадрат
SU1032462A2 (ru) Устройство дл определени коэффициентов передачи блоков аналоговой вычислительной машины
SU1348825A1 (ru) Устройство дл суммировани чисел с плавающей зап той
JPS615345A (ja) 直列乗算方法
JPS5945260B2 (ja) カウンタのパリテイ予想回路
JPS62127940A (ja) 算術論理ユニツトとその駆動方法