JPS5874344U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS5874344U
JPS5874344U JP17038181U JP17038181U JPS5874344U JP S5874344 U JPS5874344 U JP S5874344U JP 17038181 U JP17038181 U JP 17038181U JP 17038181 U JP17038181 U JP 17038181U JP S5874344 U JPS5874344 U JP S5874344U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
wiring board
semiconductor device
printed wiring
recorded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17038181U
Other languages
Japanese (ja)
Inventor
昌男 柴田
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP17038181U priority Critical patent/JPS5874344U/en
Publication of JPS5874344U publication Critical patent/JPS5874344U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の半導体装置を印刷配線基板に実装した側
面図、第2図乃至第7図は本考案の実施例による半導体
装置を示し、特に第2図b1第4図aおよび警6図aは
各実施例における半導体装置を印刷配線基板に実装した
側面図、第2図b1第3図、第4図b1第5図、第6図
すおよび第7図は各実施例の裏面図を示す。 1・・・・・・半導体装置、2・・・・・・接続端子、
3・・・・・・半田、4・・・・・・印刷配線基板、5
・・・・・・接着剤、6・・・・・パ 印刷配線基板の
印刷配線面、7・・・・・・接着剤を吸収するための溝
、訃・・・・・接着剤を吸収するための段差、9・・・
・・・接着剤が流れ出ないようにする段差。
Fig. 1 is a side view of a conventional semiconductor device mounted on a printed wiring board, and Figs. 2 to 7 show semiconductor devices according to embodiments of the present invention, particularly Fig. 2b, Fig. 4a, and Fig. 6. a is a side view of the semiconductor device in each embodiment mounted on a printed wiring board; FIG. 2 b1 FIG. 3, FIG. 4 b1 FIG. show. 1... Semiconductor device, 2... Connection terminal,
3...Solder, 4...Printed wiring board, 5
...Adhesive, 6...P Printed wiring surface of printed wiring board, 7...Groove for absorbing adhesive, butt...Absorbing adhesive 9 steps to...
...A step that prevents adhesive from flowing out.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 配線基板に密着する面に溝または段差を設けたことを特
徴とする半導体装置。
A semiconductor device characterized in that a groove or a step is provided on a surface that is in close contact with a wiring board.
JP17038181U 1981-11-16 1981-11-16 semiconductor equipment Pending JPS5874344U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17038181U JPS5874344U (en) 1981-11-16 1981-11-16 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17038181U JPS5874344U (en) 1981-11-16 1981-11-16 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS5874344U true JPS5874344U (en) 1983-05-19

Family

ID=29962341

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17038181U Pending JPS5874344U (en) 1981-11-16 1981-11-16 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS5874344U (en)

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