JPS5871661A - Manufacture of thin film transistor with anodic oxidation insulating film - Google Patents
Manufacture of thin film transistor with anodic oxidation insulating filmInfo
- Publication number
- JPS5871661A JPS5871661A JP16981281A JP16981281A JPS5871661A JP S5871661 A JPS5871661 A JP S5871661A JP 16981281 A JP16981281 A JP 16981281A JP 16981281 A JP16981281 A JP 16981281A JP S5871661 A JPS5871661 A JP S5871661A
- Authority
- JP
- Japan
- Prior art keywords
- film
- metal
- anodic oxidation
- source
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000010408 film Substances 0.000 title claims abstract description 107
- 230000003647 oxidation Effects 0.000 title claims abstract description 26
- 238000007254 oxidation reaction Methods 0.000 title claims abstract description 26
- 239000010409 thin film Substances 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 40
- 239000002184 metal Substances 0.000 claims abstract description 38
- 229910052751 metal Inorganic materials 0.000 claims abstract description 38
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 9
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 23
- 238000007743 anodising Methods 0.000 claims description 8
- 239000010407 anodic oxide Substances 0.000 claims description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims 2
- 239000003990 capacitor Substances 0.000 abstract description 12
- 239000011521 glass Substances 0.000 abstract description 4
- 239000000919 ceramic Substances 0.000 abstract description 3
- 239000000463 material Substances 0.000 abstract description 3
- 230000010354 integration Effects 0.000 abstract description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 1
- 230000002411 adverse Effects 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 7
- 238000009413 insulation Methods 0.000 description 5
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical compound OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 description 3
- 238000002048 anodisation reaction Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 239000012212 insulator Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 101000756817 Drosophila melanogaster Regulator of G-protein signaling loco Proteins 0.000 description 1
- 210000003323 beak Anatomy 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 235000019645 odor Nutrition 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Abstract
Description
【発明の詳細な説明】
本発明は、薄膜トランジスタ（ＴＦＴ）のスイッチング
特性を左右するゲート絶縁膜の低温形成及びＬＯＣＯ８
分離或いは、キャパンターを形成する工程に関する、１
絶縁ゲート薄膜トランジスタの構造は、基板−半導体４
膜−絶縁層一導電層である。４膜トランジスタの特徴で
ある大面積化及び、安価である性質を利用するためには
、基板として、ガラス及びセラミックスを、史用する事
が考えられ、その場合には、高温での処理が難しくなる
。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to low-temperature formation of a gate insulating film that influences the switching characteristics of a thin film transistor (TFT), and
Regarding the process of separating or forming a capantor, 1. The structure of an insulated gate thin film transistor is a substrate-semiconductor 4
A film is an insulating layer and a conductive layer. In order to take advantage of the large area and low cost characteristics of four-film transistors, it is possible to use glass or ceramics as the substrate, but in that case, it is difficult to process at high temperatures. Become.
曳在、半導体技術において使用されているゲート絶縁膜
には、ＳｉＯ□及び、７Ｌ’２０３があるが、現在の所
、熱酸化法を主に利用している。だが、基板により温変
の制約を受ける場合、一般に利用されている熱酸化は難
しい。他の絶縁膜形成法としては、ＰＶＤ及びＣＶＤ法
があるが、熱酸化膜に比べて、幌の均一性、絶縁性、膜
中の欠陥、不純物密度、界面準位密度等の点で劣ってい
る。また、高性能、低消亀型薄膜トランジスタを製造す
るためには、絶縁層を薄くするか、誘電率の火点な膜（
ｉｌ−使用し、絶縁性の向上が必要になり、半導体膜−
電極間及び、電極−電極間のリークが問題となる。そこ
で、本発明は上記問題点の解決法として、金・４嗅の酸
化嗅が考えられる。本発明では、酸化膜の均一性、絶縁
性、膜中の欠陥、不純物密伎、界面密度等において、現
在使用されている熱酸化喚に匹敵する膜を金属の陽極酸
化を利用して形成する事を特徴とし、同時に、一般に問
題とされている半導体膜の横方向リークを防ぐために半
導体膜を金属の陽極酸化膜（Ｃよｉ：ｌ、ＬＯＣＯ８分
離し、高性能スイッチング薄膜トランジスタを製造する
ことを目的とする。Gate insulating films currently used in semiconductor technology include SiO□ and 7L'203, but at present, thermal oxidation is mainly used. However, the commonly used thermal oxidation method is difficult if the substrate is subject to temperature change constraints. Other insulating film formation methods include PVD and CVD, but these methods are inferior to thermal oxide films in terms of uniformity of the hood, insulation properties, defects in the film, impurity density, interface state density, etc. There is. In addition, in order to manufacture high-performance, low-dissipation type thin film transistors, it is necessary to make the insulating layer thinner or to make a film with a high dielectric constant (
When using il, it is necessary to improve the insulation properties, and the semiconductor film
Leakage between electrodes and between electrodes becomes a problem. Therefore, in the present invention, as a solution to the above-mentioned problems, oxidation of gold and four odors is considered. The present invention uses metal anodic oxidation to form a film that is comparable to currently used thermal oxidation methods in terms of oxide film uniformity, insulation, defects in the film, impurity density, interface density, etc. At the same time, in order to prevent lateral leakage of the semiconductor film, which is generally considered a problem, the semiconductor film is separated into a metal anodic oxide film (C:i:l, LOCO8) to produce high-performance switching thin film transistors. purpose.
即ち、絶縁性基板上に半導体膜を形成する方法としては
、低温において、プラズマ及び低圧ＣＶＤ或いは、Ｐｖ
Ｄ等が考えられるが、形成された嗅はンート抵抗が犬す
＜、半導体膜の実体酸化は難しいので、半導体膜及び基
板上へ金属膜を形成し、金属膜上へ絶縁性膜をパターニ
ングし、該絶縁性膜を陽極酸化、用のマスクとし、マス
クされた金属部分を陽極酸′化用電極として金属膜を陽
極酸化し、半導体膜上に形成さ扛た陽極酸化膜をゲート
絶縁−として利用するとともに、陽極酸化によりパター
ニングされた金属膜の部分をソース及びドレイン電極と
して利用し、かつ、該電極を設ける事により、陽極酸化
の過程で発生する酸化膜中の孤立べ金属部分が存在する
場合、膜質の劣化が起こるため、電圧をかかり易くシ、
陽極酸化膜中への金ｍ部分の存在を無くシ、均一かつ、
良質な酸化膜形成を可能にし、さらに、基板上に形成さ
れた絶縁性膜）ｌこより、該電極部分の分離、及び、半
導体膜のＬＯＧＯ８分離により、薄膜トランジスタのス
イッチング特性或いは、高集積化或いは、消電に対して
悪影響を及ぼす横方向リークを防止する憫造として薄膜
トランジスタの製造するものである。That is, as a method for forming a semiconductor film on an insulating substrate, plasma and low pressure CVD or Pv
D etc. can be considered, but since the formed olfactory resistance is too low and substantial oxidation of the semiconductor film is difficult, a metal film is formed on the semiconductor film and the substrate, and an insulating film is patterned on the metal film. The insulating film is used as a mask for anodizing, the masked metal part is used as an electrode for anodizing, the metal film is anodized, and the anodic oxide film formed on the semiconductor film is used as a gate insulator. In addition, by using the parts of the metal film patterned by anodic oxidation as source and drain electrodes, and by providing these electrodes, there are isolated metal parts in the oxide film that are generated during the anodic oxidation process. In this case, the film quality deteriorates, making it easy to apply voltage.
Eliminate the presence of gold m part in the anodic oxide film, uniformly and
This makes it possible to form a high-quality oxide film, and further improves the switching characteristics of thin film transistors, high integration, Thin film transistors are manufactured as a mechanism to prevent lateral leakage, which has a negative effect on power dissipation.
壕だ、該基板上に形成された陽極酸化膜をキャパシター
として利用する事により、工程的に簡略化されるととも
に、配線において陽極酸化以前の金媚上ヘパターニング
する事により、配線の面積、及び工程の短縮を可能とす
る薄膜トランジスタの製造法も含んでいる。さらに、キ
ャパシターの基板面上の電極としては、半導体膜にドー
ピングした場合、ドーピング処理による低抵抗半導体膜
を利用することもで弯る。また、ソース或いは、ドレイ
ンの片方から、キャパシターへの電極配線は、ゲート配
線と同時に行える。By using the anodic oxide film formed on the substrate as a capacitor, the manufacturing process is simplified, and by patterning the wiring on the metal layer before anodizing, the wiring area and It also includes a method for manufacturing thin film transistors that enables shortening of process steps. Furthermore, when a semiconductor film is doped, a low-resistance semiconductor film processed by doping may be used as the electrode on the substrate surface of the capacitor. Furthermore, the electrode wiring from one of the source or drain to the capacitor can be done at the same time as the gate wiring.
この様にこの発明の特徴は、基板上に半導体膜を形成し
、半導体膜をパターン化した上に金属嗅紫コーティング
し、金属膜上へ絶縁性膜をパターニングし、絶縁性膜を
マスクとし衣金属暎の部分を陽極酸化用電極として陽極
酸化し、半導体膜上の金属酸化膜をゲート絶縁層とし、
基板上の酸化膜により、半導体層をＬＯＣＯ８分離する
工程を有し、または、基板上の酸化物層をキャパシター
として利用する薄膜トランジスタ製造法に係る。As described above, the characteristics of the present invention are to form a semiconductor film on a substrate, pattern the semiconductor film, apply a metallurgical coating on the patterned semiconductor film, pattern an insulating film on the metal film, and use the insulating film as a mask to coat the metal film. The metal layer is anodized as an electrode for anodic oxidation, and the metal oxide film on the semiconductor film is used as a gate insulating layer.
The present invention relates to a thin film transistor manufacturing method that includes a step of separating a semiconductor layer by LOCO8 using an oxide film on a substrate, or uses an oxide layer on a substrate as a capacitor.
以下本発明の実施例を図を用いて説明する。第１図Ａ−
Ｇは、本発明の工程を示す実施例であるＡ図に於いて、
１１はガラス、セラミックス、半導体等から成る基板で
あり、１２はパターニングされたＳｃ、 Ｔｅ５ＧａＡ
ｓ等の半導体膜である。 半導体膜の形成法としては１
．ＣＶＤ 、ＰＶＤ 、プラズマＣＶＤ等で、パターン
化としては、半導体技術に一般に利用されているホトリ
ソグラフィで行う工程である。。Ｂ図に於いては、１３
は陽極嘴化しようとするＴａ 、 Ａｔ等の材料から成
る金属膜であり、金属膜の形成法としては、ＰｖＤ、プ
ラズマ蒸着、スパッタ蒸着、ＭＯＣｖＤ等で行う工程で
ある（実際に、基板及び半導体膜上べ、金属膜を形成し
た図がＢである）。６図に於いては１４は、パターニン
グされた絶縁性膜で、この絶縁性膜で金＠をコーティン
グすることにより、陽極酸化の場合の陽極酸化防止マス
クとしての役割りをするとともに、金属膜の陽極酸化が
進むに従って、金属酸化膜中に存在する孤立した不完全
な酸化状西、或いは、金属状の状態で存在する部分への
電圧のかかり方を均一にし、均一かつ、完全な酸化膜形
成をする電極として利用する、或いは、薄膜トランジス
タ製造時のソース及び、ドレイン電極として利用するた
めのパターニングした電極（金属部分）を形成するため
に利用する電極形成用のマスクで行う工程である。Ｄ図
では、６図に於いて形成した基板を実際に陽極酸化する
場合の図で、１５は陽極酸化により形成された金属酸化
物、１６は金属の陽極酸化に利用するエチレングリコ−
ル、蟻酸、弗化アンモニウム、テトラフリルアルコール
等の電解液、１７はレジスト、ＰＩＱｌＰＩＸ等の絶縁
性膜である。この絶縁性膜１７は、陽極酸化を安定に行
ったり、或いは、陽極酸化用リード線１９をコーティン
グしたりするだめの絶縁性膜で行う工程で、Ｃメの絶縁
性膜１４の形成と同時に形成することが可能である。１
８は陽極酸化用電源であり、２０は金属膜の陽極酸化に
おいて電圧をかけるだめのｐｔ等材の対向電極である。Embodiments of the present invention will be described below with reference to the drawings. Figure 1 A-
In figure A, which is an example showing the process of the present invention,
11 is a substrate made of glass, ceramics, semiconductor, etc., and 12 is a patterned Sc, Te5GaA.
It is a semiconductor film such as s. 1 as a method of forming a semiconductor film
．． In CVD, PVD, plasma CVD, etc., patterning is a process performed by photolithography, which is commonly used in semiconductor technology. . In figure B, 13
is a metal film made of materials such as Ta and At that is to be formed into an anode beak.Metal film formation methods include PvD, plasma evaporation, sputter evaporation, MOCvD, etc. Figure B shows a metal film formed on top of the film). In Fig. 6, 14 is a patterned insulating film. By coating gold with this insulating film, it serves as a mask to prevent anodic oxidation during anodic oxidation, and also serves as a mask for preventing metal film. As anodic oxidation progresses, the voltage is uniformly applied to isolated incomplete oxides in the metal oxide film, or to parts that exist in a metallic state, forming a uniform and complete oxide film. This process is performed using a mask for electrode formation, which is used to form patterned electrodes (metal parts) to be used as electrodes for manufacturing thin film transistors, or as source and drain electrodes when manufacturing thin film transistors. In Figure D, the substrate formed in Figure 6 is actually anodized; 15 is the metal oxide formed by the anodization, and 16 is the ethylene glycol used in the anodization of the metal.
17 is an insulating film such as a resist or PIQlPIX. This insulating film 17 is formed at the same time as the C-shaped insulating film 14 in a process performed using a non-insulating film to stably perform anodic oxidation or to coat the lead wire 19 for anodizing. It is possible to do so. 1
8 is a power source for anodic oxidation, and 20 is a counter electrode made of a material such as PT for applying voltage during anodic oxidation of a metal film.
Ｅ図は、陽極酸化により形成された金属酸化膜１５、半
導体膜１２、陽極酸化の際の電圧印加用及びソース−ド
レイン電極として利用される金一部分２３及び、ソース
−ドレイン電極間に形成された金属酸化膜上に形成した
ゲート電極２１により構成された薄膜トランジスタを形
成する工程である。この薄膜トランジスタの構造は、半
導体１２が絶縁膜１５によりＬＯＣＯ８分離されており
、半導体間のリークが防止で缶、かつ、ソース−ドレイ
ン電極として利用される金属部分２３も、絶縁膜１５に
より分離されており、電極間゛リークも防止で舌る構造
である。又、工程数も少く、改善がされている。また、
Ｆ図の工程で示すような金属の陽極酸化物を利用したキ
ャパシタ一部分２２を形成する。更にＧ図の如く容［２
６を構成する。即ちＧ図の１１は基板、１３はパターニ
ングされた、陽極酸化されていない金属部分で、ソース
−ドレイン電極として利用される。１５は金属酸化膜上
−ニング薄膜トランジスタの半導体膜のＭＯ８％性の向
上を目的とし、ドーピングした半導体膜であり、キャパ
シター２６の下電極として利用されている。２４はゲー
ト電極２１の形成の際にパターニングされたキャパシタ
ーの上電極であり、ソース或いは、ドレインの片側の電
極とコンタクトされて形成する工程で、つまりこの工程
により、薄膜半導体のプロセスが簡略化で炙ると同時に
、性能の向上にも有効であり、薄膜トランジスタの特徴
を利用するのに適している。つまり、安価な基板である
ガラス等を利用した低温プロセスに対して有効であり、
かつ、高抵抗半導体膜でも、金属の陽極酸化のため、問
題がなく、かつ、ソース−ドレイン電極の形成及び、ゲ
ート絶縁膜形成、ＬＯＣＯ８分離が簡単に実施でへ、さ
らに容量部分の同時形成も可能なため、薄膜トランジス
タの利点である低コスト化に有効であり、性能を向上さ
せ、特に、液晶等を用いた表示パネル基板上への薄膜ト
ランジスタ作成に有効な技術で、腕時計等の小型携帯機
器への表示装置として特に適している。Figure E shows a metal oxide film 15 formed by anodic oxidation, a semiconductor film 12, a gold portion 23 used for voltage application and as a source-drain electrode during anodic oxidation, and a gold portion 23 formed between the source-drain electrodes. This is a step of forming a thin film transistor composed of a gate electrode 21 formed on a metal oxide film. The structure of this thin film transistor is that the semiconductor 12 is separated by 8 LOCOs of insulation film 15 to prevent leakage between the semiconductors, and the metal portion 23 used as the source-drain electrode is also separated by the insulation film 15. The structure also prevents leakage between electrodes. In addition, the number of steps is reduced, which has been improved. Also,
A capacitor portion 22 using a metal anodic oxide is formed as shown in the process shown in FIG. Furthermore, as shown in Figure G [2
6. That is, in Figure G, 11 is a substrate, and 13 is a patterned metal portion that is not anodized, and is used as a source-drain electrode. 15 is a semiconductor film doped with a metal oxide film for the purpose of improving the MO8% property of the semiconductor film of the thin film transistor, and is used as the lower electrode of the capacitor 26. Reference numeral 24 designates the upper electrode of the capacitor that is patterned during the formation of the gate electrode 21, and is formed in a process in which it is in contact with one side electrode of the source or drain.In other words, this process simplifies the thin film semiconductor process. At the same time, it is effective for improving performance, and is suitable for taking advantage of the characteristics of thin film transistors. In other words, it is effective for low-temperature processes using inexpensive substrates such as glass.
In addition, there is no problem with high-resistance semiconductor films because the metal is anodized, and the formation of source-drain electrodes, gate insulating film formation, and LOCO8 separation can be easily performed, and the capacitance portion can also be formed at the same time. This technology is effective for reducing costs, which is an advantage of thin film transistors, and improves performance. It is especially effective for creating thin film transistors on display panel substrates using liquid crystals, etc., and is useful for small portable devices such as wristwatches. It is particularly suitable as a display device.
なお、この実施例の場合、液体中での陽極酸化の例を示
したが、気相中での陽極酸化・も含む。In this example, although an example of anodic oxidation in a liquid is shown, anodic oxidation in a gas phase is also included.
第１図（４）〜（Ｇ）は、パターニングした半導体膜上
へ金属膜を形成し、陽極酸化を行ない、酸化嗅を形成し
、ゲート絶縁膜、容量部分、ＬＯＣＯ８分離及びソース
ードレイン電極を有する薄膜トランジスタの製造工程を
示す各工程図である。
１１：基板、１２：半導体膜、
１３：金属膜、 １４：絶縁性膜
１５：金属酸化模、 １６：電解液
１７：絶縁膜、 １８：電源
１９：リード線、 ２ｏ：対向電極
２１：ゲート電極、２２：キャパシタ一部分２３：金属
２５ニド−ピングした半導体膜
２６：キャパシター。
第１図
昭和 年 月 日
特許庁長官島田春樹殿
１、事件の表示
昭和５６年特許願第７１！５９８１２号２、発明の名称
賜島４酸づ罎縁膜表有ｆ６簿模トランジスタ穆ム隻う友
３、補正をする者
事件との関係 特許出願人
電話（東京）３４２−１２３１
４、補正命令の日付
自 発
゛６．補正の対象
明細書の「％許請求の範囲」、「発明の詳細な説明」及
び「図面の簡単な説明」の欄
７、補正の内容
（１）特許請求の範囲を別紙のとおり補正する。
（２）明細書の下記貞、行の［ＬＯＣＯ８Ｊとあるを「
絶縁体」と訂正する。
（イ）第１頁第１９行目
（ロ）第３頁第 ６行目
（ハ）ｇ４頁第 ７行目
に）第５頁第 ９行目
（ホ）第７頁第１７行目
（へ）第９貞第２行目及び第１４行目
特許請求の範囲
基板上に半導体膜を形成する工程と、該基板上に金属膜
をコーティングする工程と、該金属膜上へ絶縁性膜をパ
ターニングする工程と、該絶縁性膜をマスクとした金属
膜の部分を電極として陽極酸化する工程と、前記半導体
膜上の金属の陽極酸化膜をゲートとし、前記パターニン
グ部分の金属膜をソース・ドレイン電極とし、前記基板
上の陽極酸化膜によシ、前記半導体膜を絶縁体分離する
事が同時にできる工程とから成る陽極酸化絶縁膜を有す
る薄膜トランジスタ製造法。In Figure 1 (4) to (G), a metal film is formed on the patterned semiconductor film, anodization is performed to form an oxidation layer, and a gate insulating film, capacitor part, LOCO8 isolation, and source/drain electrodes are formed. FIG. 3 is a diagram illustrating the manufacturing process of a thin film transistor having the structure shown in FIG. 11: Substrate, 12: Semiconductor film, 13: Metal film, 14: Insulating film 15: Metal oxide model, 16: Electrolyte 17: Insulating film, 18: Power supply 19: Lead wire, 2o: Opposing electrode 21: Gate electrode , 22: Capacitor portion 23: Metal 25 doped semiconductor film 26: Capacitor. Fig. 1 Haruki Shimada, Commissioner of the Japan Patent Office (1978), 1. Indication of the incident, 1988 Patent Application No. 71!59812, 2. Name of the invention, 4 oxides, 4 layers, 4 layers, 4 layers, 1 frame, 1 layer, 1 layer of f6 booklet model transistor Friend 3. Relationship with the case of the person making the amendment Patent applicant Telephone number (Tokyo) 342-1231 4. Date of amendment order issued 6. Column 7 of "Percentage of Claims", "Detailed Description of the Invention" and "Brief Description of Drawings" of the specification to be amended, contents of amendment (1) The scope of claims will be amended as shown in the attached sheet. (2) In the following line of the statement, replace [LOCO8J] with "
Insulator” is corrected. (B) Page 1, line 19 (B) Page 3, line 6 (C) g Page 4, line 7) Page 5, line 9 (E) Page 7, line 17 (F) ) No. 9, lines 2 and 14 Claims A step of forming a semiconductor film on a substrate, a step of coating a metal film on the substrate, and a patterning of an insulating film on the metal film. a step of anodizing the metal film using the insulating film as a mask as an electrode; and a step of anodizing the metal film on the semiconductor film as a gate and using the patterned metal film as a source/drain electrode. A method for manufacturing a thin film transistor having an anodized insulating film, comprising the steps of: separating the semiconductor film into an insulator at the same time as the anodic oxide film on the substrate;
Claims (1)
’にコーティングする工程と、該金＠幌上へ絶縁性膜全
パターニングする工程と、該絶縁性嘆をマスクとした金
属嗅の部分を電極として陽極酸化する工程と、前記半導
体膜上の金属の陽極酸化膜をゲートとし、前記バターニ
ノグ部分の金鴎嘆をソース・ドレイン電極とし、前記基
板上の陽極峡化膜により、前記半導体膜をＬＯＣＯ８Ｏ
＠する事が同時にで嘴る工程とから成る陽極酸化絶縁膜
を有する薄膜トランジスタ製造法。A step of forming a semiconductor film on a substrate, and a step of forming a metal film on the substrate.
a step of fully patterning the insulating film on the gold hood, a step of anodizing the metal layer using the insulating film as a mask as an electrode, and a step of anodizing the metal layer on the semiconductor film. The anodic oxide film is used as a gate, the metal oxide film on the butterfly part is used as a source/drain electrode, and the semiconductor film is formed into a LOCO8O film by an anodic oxidation film on the substrate.
A method for manufacturing a thin film transistor having an anodized insulating film, which comprises a step of simultaneously depositing and depositing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16981281A JPS5871661A (en) | 1981-10-23 | 1981-10-23 | Manufacture of thin film transistor with anodic oxidation insulating film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16981281A JPS5871661A (en) | 1981-10-23 | 1981-10-23 | Manufacture of thin film transistor with anodic oxidation insulating film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5871661A true JPS5871661A (en) | 1983-04-28 |
| JPH0353787B2 JPH0353787B2 (en) | 1991-08-16 |
Family
ID=15893352
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16981281A Granted JPS5871661A (en) | 1981-10-23 | 1981-10-23 | Manufacture of thin film transistor with anodic oxidation insulating film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5871661A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59177967A (en) * | 1983-03-28 | 1984-10-08 | Komatsu Ltd | Thin-film transistor and manufacture thereof |
| JPS62271471A (en) * | 1986-05-20 | 1987-11-25 | Sanyo Electric Co Ltd | Thin-film transistor |
| US4754614A (en) * | 1986-02-07 | 1988-07-05 | Mitsubishi Denki Kabushiki Kaisha | Prime-motor-driven room warming/cooling and hot water supplying apparatus |
| EP0506117A2 (en) * | 1991-03-29 | 1992-09-30 | Casio Computer Company Limited | Thin-film transistor |
-
1981
- 1981-10-23 JP JP16981281A patent/JPS5871661A/en active Granted
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59177967A (en) * | 1983-03-28 | 1984-10-08 | Komatsu Ltd | Thin-film transistor and manufacture thereof |
| US4754614A (en) * | 1986-02-07 | 1988-07-05 | Mitsubishi Denki Kabushiki Kaisha | Prime-motor-driven room warming/cooling and hot water supplying apparatus |
| JPS62271471A (en) * | 1986-05-20 | 1987-11-25 | Sanyo Electric Co Ltd | Thin-film transistor |
| EP0506117A2 (en) * | 1991-03-29 | 1992-09-30 | Casio Computer Company Limited | Thin-film transistor |
| EP0506117A3 (en) * | 1991-03-29 | 1995-09-27 | Casio Computer Co Ltd | Thin-film transistor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0353787B2 (en) | 1991-08-16 |
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