JPS5866777U - Detection circuit - Google Patents

Detection circuit

Info

Publication number
JPS5866777U
JPS5866777U JP15962581U JP15962581U JPS5866777U JP S5866777 U JPS5866777 U JP S5866777U JP 15962581 U JP15962581 U JP 15962581U JP 15962581 U JP15962581 U JP 15962581U JP S5866777 U JPS5866777 U JP S5866777U
Authority
JP
Japan
Prior art keywords
capacitor
detection circuit
switch
reference potential
switches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15962581U
Other languages
Japanese (ja)
Inventor
満 工藤
一三夫 中川
Original Assignee
株式会社日立製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社日立製作所 filed Critical 株式会社日立製作所
Priority to JP15962581U priority Critical patent/JPS5866777U/en
Publication of JPS5866777U publication Critical patent/JPS5866777U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来回路の一実施例を示す回路図、第2図は第
1図に示す回路の主要波形図、第3図は本発明を利用し
た一実施例を示す図、第4図は本発明を利用した一実施
例の主要波形図である。 −図において、6はピーク検
波回路、7は検波フィルタ、8はACC回路である。
FIG. 1 is a circuit diagram showing an example of a conventional circuit, FIG. 2 is a main waveform diagram of the circuit shown in FIG. 1, FIG. 3 is a diagram showing an example using the present invention, and FIG. FIG. 3 is a main waveform diagram of an embodiment using the present invention. - In the figure, 6 is a peak detection circuit, 7 is a detection filter, and 8 is an ACC circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] その出力端に第1、第2、第3の容量の一端をそれぞれ
接続し、第1の容量の他端にヘッドの切換タイミングに
同期した信号により基準電位と接続する第1のスイッチ
を接続し、第2の容量の他端に第1のスイッチに印加し
た信号の逆極性の信号により基準電位と接続する第2の
スイッチを接続し、第3の容量の他端は基準電位に接続
し、第1、第2のスイッチがオンした時だけ、該スイッ
チに接続する第1の容量か第2の容量のいずれか一方を
検波フィルタとして動作させることを特徴−とじた検波
回路。
One end of the first, second, and third capacitors are each connected to the output terminal thereof, and a first switch is connected to the other end of the first capacitor to be connected to the reference potential by a signal synchronized with the switching timing of the head. , the other end of the second capacitor is connected to a second switch that is connected to the reference potential by a signal of opposite polarity to the signal applied to the first switch, and the other end of the third capacitor is connected to the reference potential; A detection circuit characterized in that only when the first and second switches are turned on, either the first capacitor or the second capacitor connected to the switches is operated as a detection filter.
JP15962581U 1981-10-28 1981-10-28 Detection circuit Pending JPS5866777U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15962581U JPS5866777U (en) 1981-10-28 1981-10-28 Detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15962581U JPS5866777U (en) 1981-10-28 1981-10-28 Detection circuit

Publications (1)

Publication Number Publication Date
JPS5866777U true JPS5866777U (en) 1983-05-06

Family

ID=29952074

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15962581U Pending JPS5866777U (en) 1981-10-28 1981-10-28 Detection circuit

Country Status (1)

Country Link
JP (1) JPS5866777U (en)

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