JPS5857902B2 - 狭いマスク開孔の形成方法 - Google Patents

狭いマスク開孔の形成方法

Info

Publication number
JPS5857902B2
JPS5857902B2 JP54130940A JP13094079A JPS5857902B2 JP S5857902 B2 JPS5857902 B2 JP S5857902B2 JP 54130940 A JP54130940 A JP 54130940A JP 13094079 A JP13094079 A JP 13094079A JP S5857902 B2 JPS5857902 B2 JP S5857902B2
Authority
JP
Japan
Prior art keywords
region
layer
silicon
etching
narrow
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54130940A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5563827A (en
Inventor
アービング・ツー・ホウ
ジエイカブ・ライズマン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5563827A publication Critical patent/JPS5563827A/ja
Publication of JPS5857902B2 publication Critical patent/JPS5857902B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H10P76/4085—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/299—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
    • H10D62/307—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations the doping variations being parallel to the channel lengths
    • H10P50/283—
    • H10W10/0125—
    • H10W10/13—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/116—Oxidation, differential
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/131—Reactive ion etching rie
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/141—Self-alignment coat gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing

Landscapes

  • Element Separation (AREA)
  • Bipolar Transistors (AREA)
  • Drying Of Semiconductors (AREA)
JP54130940A 1978-11-03 1979-10-12 狭いマスク開孔の形成方法 Expired JPS5857902B2 (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/957,605 US4209349A (en) 1978-11-03 1978-11-03 Method for forming a narrow dimensioned mask opening on a silicon body utilizing reactive ion etching

Publications (2)

Publication Number Publication Date
JPS5563827A JPS5563827A (en) 1980-05-14
JPS5857902B2 true JPS5857902B2 (ja) 1983-12-22

Family

ID=25499844

Family Applications (2)

Application Number Title Priority Date Filing Date
JP54130940A Expired JPS5857902B2 (ja) 1978-11-03 1979-10-12 狭いマスク開孔の形成方法
JP57061208A Granted JPS57184249A (en) 1978-11-03 1982-04-14 Method of forming double dispersion type fet device

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP57061208A Granted JPS57184249A (en) 1978-11-03 1982-04-14 Method of forming double dispersion type fet device

Country Status (6)

Country Link
US (1) US4209349A (index.php)
EP (1) EP0010624B1 (index.php)
JP (2) JPS5857902B2 (index.php)
CA (1) CA1120609A (index.php)
DE (1) DE2963174D1 (index.php)
IT (1) IT1164517B (index.php)

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US4488162A (en) * 1980-07-08 1984-12-11 International Business Machines Corporation Self-aligned metal field effect transistor integrated circuits using polycrystalline silicon gate electrodes
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US4688073A (en) * 1981-03-30 1987-08-18 Goth George R Lateral device structures using self-aligned fabrication techniques
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US4636834A (en) * 1983-12-12 1987-01-13 International Business Machines Corporation Submicron FET structure and method of making
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US4662956A (en) * 1985-04-01 1987-05-05 Motorola, Inc. Method for prevention of autodoping of epitaxial layers
US4678537A (en) * 1985-05-23 1987-07-07 Sony Corporation Method of manufacturing semiconductor devices
US4648937A (en) * 1985-10-30 1987-03-10 International Business Machines Corporation Method of preventing asymmetric etching of lines in sub-micrometer range sidewall images transfer
US4654119A (en) * 1985-11-18 1987-03-31 International Business Machines Corporation Method for making submicron mask openings using sidewall and lift-off techniques
US4707218A (en) 1986-10-28 1987-11-17 International Business Machines Corporation Lithographic image size reduction
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Also Published As

Publication number Publication date
JPS5563827A (en) 1980-05-14
JPH0358173B2 (index.php) 1991-09-04
IT1164517B (it) 1987-04-15
EP0010624A1 (de) 1980-05-14
EP0010624B1 (de) 1982-06-23
IT7926807A0 (it) 1979-10-26
US4209349A (en) 1980-06-24
CA1120609A (en) 1982-03-23
DE2963174D1 (en) 1982-08-12
JPS57184249A (en) 1982-11-12

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