JPS5856058A - 仮想計算機システムｃｐ常駐ボリユ−ムのｄａｓｄ共用管理方式 - Google Patents

仮想計算機システムｃｐ常駐ボリユ−ムのｄａｓｄ共用管理方式

Info

Publication number
JPS5856058A
JPS5856058A JP56154504A JP15450481A JPS5856058A JP S5856058 A JPS5856058 A JP S5856058A JP 56154504 A JP56154504 A JP 56154504A JP 15450481 A JP15450481 A JP 15450481A JP S5856058 A JPS5856058 A JP S5856058A
Authority
JP
Japan
Prior art keywords
volume
ipl
record
resident
computer system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56154504A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6339933B2 (OSRAM
Inventor
Mitsunori Michishita
道下　光則
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56154504A priority Critical patent/JPS5856058A/ja
Publication of JPS5856058A publication Critical patent/JPS5856058A/ja
Publication of JPS6339933B2 publication Critical patent/JPS6339933B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP56154504A 1981-09-29 1981-09-29 仮想計算機システムｃｐ常駐ボリユ−ムのｄａｓｄ共用管理方式 Granted JPS5856058A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56154504A JPS5856058A (ja) 1981-09-29 1981-09-29 仮想計算機システムｃｐ常駐ボリユ−ムのｄａｓｄ共用管理方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56154504A JPS5856058A (ja) 1981-09-29 1981-09-29 仮想計算機システムｃｐ常駐ボリユ−ムのｄａｓｄ共用管理方式

Publications (2)

Publication Number Publication Date
JPS5856058A true JPS5856058A (ja) 1983-04-02
JPS6339933B2 JPS6339933B2 (OSRAM) 1988-08-09

Family

ID=15585682

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56154504A Granted JPS5856058A (ja) 1981-09-29 1981-09-29 仮想計算機システムｃｐ常駐ボリユ−ムのｄａｓｄ共用管理方式

Country Status (1)

Country Link
JP (1) JPS5856058A (OSRAM)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62165251A (ja) * 1986-01-16 1987-07-21 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 仮想記憶仮想計算機型データ処理システムの入出力制御方法
US6167459A (en) * 1998-10-07 2000-12-26 International Business Machines Corporation System for reassigning alias addresses to an input/output device
US6170023B1 (en) 1998-10-07 2001-01-02 International Business Machines Corporation System for accessing an input/output device using multiple addresses
US6185638B1 (en) 1998-10-07 2001-02-06 International Business Machines Corporation Method and system for dynamically assigning addresses to an input/output device
US6202095B1 (en) 1998-10-07 2001-03-13 International Business Machines Corporation Defining characteristics between processing systems

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5023146A (OSRAM) * 1973-05-31 1975-03-12
JPS53101234A (en) * 1977-01-28 1978-09-04 Hitachi Ltd Address converting device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5023146A (OSRAM) * 1973-05-31 1975-03-12
JPS53101234A (en) * 1977-01-28 1978-09-04 Hitachi Ltd Address converting device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62165251A (ja) * 1986-01-16 1987-07-21 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 仮想記憶仮想計算機型データ処理システムの入出力制御方法
US6167459A (en) * 1998-10-07 2000-12-26 International Business Machines Corporation System for reassigning alias addresses to an input/output device
US6170023B1 (en) 1998-10-07 2001-01-02 International Business Machines Corporation System for accessing an input/output device using multiple addresses
US6185638B1 (en) 1998-10-07 2001-02-06 International Business Machines Corporation Method and system for dynamically assigning addresses to an input/output device
US6202095B1 (en) 1998-10-07 2001-03-13 International Business Machines Corporation Defining characteristics between processing systems

Also Published As

Publication number Publication date
JPS6339933B2 (OSRAM) 1988-08-09

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