JPS5853087A - レジスタの読出制御方式 - Google Patents

レジスタの読出制御方式

Info

Publication number
JPS5853087A
JPS5853087A JP56151702A JP15170281A JPS5853087A JP S5853087 A JPS5853087 A JP S5853087A JP 56151702 A JP56151702 A JP 56151702A JP 15170281 A JP15170281 A JP 15170281A JP S5853087 A JPS5853087 A JP S5853087A
Authority
JP
Japan
Prior art keywords
readout
circuit
gate
transfer gate
turned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56151702A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6156594B2 (enrdf_load_stackoverflow
Inventor
Hitoshi Sato
均 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56151702A priority Critical patent/JPS5853087A/ja
Publication of JPS5853087A publication Critical patent/JPS5853087A/ja
Publication of JPS6156594B2 publication Critical patent/JPS6156594B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
    • G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
JP56151702A 1981-09-25 1981-09-25 レジスタの読出制御方式 Granted JPS5853087A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56151702A JPS5853087A (ja) 1981-09-25 1981-09-25 レジスタの読出制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56151702A JPS5853087A (ja) 1981-09-25 1981-09-25 レジスタの読出制御方式

Publications (2)

Publication Number Publication Date
JPS5853087A true JPS5853087A (ja) 1983-03-29
JPS6156594B2 JPS6156594B2 (enrdf_load_stackoverflow) 1986-12-03

Family

ID=15524393

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56151702A Granted JPS5853087A (ja) 1981-09-25 1981-09-25 レジスタの読出制御方式

Country Status (1)

Country Link
JP (1) JPS5853087A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63197088A (ja) * 1987-02-12 1988-08-15 Matsushita Electric Ind Co Ltd マルチポ−トメモリセル
JPH01100789A (ja) * 1987-07-02 1989-04-19 Texas Instr Inc <Ti> メモリ・セルとメモリ・セルに書込む方法
US5394364A (en) * 1993-04-01 1995-02-28 Nec Corporation High-speed memory readout circuit using a single set of data buffers

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63197088A (ja) * 1987-02-12 1988-08-15 Matsushita Electric Ind Co Ltd マルチポ−トメモリセル
JPH01100789A (ja) * 1987-07-02 1989-04-19 Texas Instr Inc <Ti> メモリ・セルとメモリ・セルに書込む方法
US5394364A (en) * 1993-04-01 1995-02-28 Nec Corporation High-speed memory readout circuit using a single set of data buffers

Also Published As

Publication number Publication date
JPS6156594B2 (enrdf_load_stackoverflow) 1986-12-03

Similar Documents

Publication Publication Date Title
JPS595993B2 (ja) フリツプフロツプ形式による２進信号の再生回路
JPS5916350B2 (ja) ２進信号用再生回路
US4336465A (en) Reset circuit
JPS5922316B2 (ja) ダイナミツクメモリ装置
US3604952A (en) Tri-level voltage generator circuit
JPS5755592A (en) Memory device
US4551821A (en) Data bus precharging circuits
JPS5853087A (ja) レジスタの読出制御方式
JPS5827917B2 (ja) Ｍｉｓ記憶回路
US4045684A (en) Information transfer bus circuit with signal loss compensation
JPS5813519Y2 (ja) 半導体記憶装置
US3832578A (en) Static flip-flop circuit
JPS62170097A (ja) 半導体記憶装置
JPS5926134B2 (ja) ラツチ回路
US3828209A (en) Flip-flop circuit
JPS597159B2 (ja) メモリ回路
JPH0377599B2 (enrdf_load_stackoverflow)
JPS6190389A (ja) 自己基準取り式の感知増幅回路
JPS63208935A (ja) デ−タ処理装置
JPH0325874B2 (enrdf_load_stackoverflow)
CN116417037A (zh) 一种随机存储器及其位线处理电路
JPS6058558B2 (ja) 半導体記憶装置
Takahashi Development of Japanese digital computers
JPS6170814A (ja) フリツプフロツプ
JPS61252707A (ja) ラツチ回路