JPS5848868A - Measuring method for pulse frequency - Google Patents

Abstract

PURPOSE:To precisely and quickly measure the frequency of an input pulse by generating standard pulses and timing pulses corresponding to a measuring period and measuring the number of standard pulses between input pulses and timing pulses continuously twice to calculate the input pulse frequency from the measured value. CONSTITUTION:Standard pulses, A, timing pulses B and auxiliary timing pulses S are found to count up input pulses E. The time from just after the arrival of the last input pulse in a measuring period Tn-1 to just after the arrival of the last input pulse in a measuring period Tn is proportional to (Pn-1-Pn+PT) and the number of input pulses arriving within the time coincides with the number Qn of input pules arriving within the measuring period Tn. Therefore if kXQn/(Pn-1-Pn+PT) is operated, a measuring output precisely proportional to the frequency of an input pulse to be detected can be found highly accurately for a short period.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse frequency measurement method that outputs from incoming input pulses a digital quantity that is proportional to the frequency of these input pulses.

With the spread of microcomputers, the development of DC devices that directly digitally control the rotational speed of electric motors has become active. In such a DDCDC device, it is necessary to detect the rotational speed as a digital quantity. For this purpose, pulses having a frequency proportional to the rotational speed to be detected are extracted from a pulse generator attached to the rotating shaft. Pulses generated by the pulse generator are input to a measurement circuit including a pulse counter via a waveform shaping circuit. In the measurement circuit, for example, input pulses arriving within a certain measurement time are integrated and counted. However, ＼
In the case of a simple method, as is well known, 1
Since a counting error of ±1 occurs, the detection error becomes relatively larger as the speed becomes lower. In order to reduce this detection error, it is necessary to set the time for integrating and counting input pulses (measurement time) to be large. In such a case, the detection delay increases accordingly, which brings about the inconvenience of deteriorating the DDCDC device control performance.

In order to eliminate the above-mentioned inconvenience and detect speed with high precision in a short time, especially in the rated speed range, a high-frequency reference pulse with a constant period is prepared and is generated while a predetermined number of input pulses are counted. It has already been proposed to obtain a digital quantity proportional to the frequency of the input pulse, ie the speed to be detected, by counting the number of reference pulses and calculating the reciprocal of the counted number of reference pulses (% open). (See Japanese Patent Publication No. 55-37707, or page 520 of "1% Permissible Pulse Circuit Technology Encyclopedia" published by Ohmsha on May 20, 1980).

However, the above-mentioned known θ) method has a problem in that the measurement time (and therefore the detection delay) varies considerably in applications where variable speed control is performed over a wide speed range. 1) For a DC device, the speed detection section can be considered as part of the controlled object, so the above means that the transfer function of the controlled object varies depending on the speed. Furthermore, this known method requires a very large number of input pulses to be counted in the low speed range, resulting in very long measurement times and correspondingly unacceptable detection delays. In the invention described in the above publication,
To solve this problem, we can determine the speed range and, if it is in the low speed range at startup, use the simple method described at the beginning, that is, the number of input pulses that arrive within a certain measurement time. It is proposed that the speed be detected by counting the speed.

An object of the present invention is to make it possible to repeatedly measure the frequency of a human pulse at regular time intervals in a short time with high precision even when the frequency of the input pulse changes over a wide range.

This purpose, according to the invention, is achieved by a constant high frequency (fo
) and a timing pulse having a constant period (1゛) corresponding to the measurement time, and an input pulse that arrives within a constant time (1'') between two timing pulses that are temporally adjacent to each other. The number Q of reference pulses generated between the time of arrival of the input pulse immediately before the generation of each timing pulse and the time of occurrence of the timing pulse, and the number of reference pulses (Q) generated between the time of arrival of the input pulse immediately before each timing pulse generation and the time of generation of the timing pulse, and the Number of reference pulses (P)
The previous nt value Pn-1 and the current count value Pn,
From the number of input pulses (Q's current count 1 round Qn), n k 豐□ Pn-IPn+p.

(where k is a constant number, PT = f - T is a constant number) and is achieved by executing the operation and outputting the result of this operation.

Therefore, according to the present invention, the measurement time (frequency measurement calculation cycle) can be kept at a constant value corresponding to the period (1) of the timing pulse with the above configuration. Moreover,
The term (P
n-1-Pn), sufficient measurement accuracy can be achieved even if the measurement time (i.e., the period T of the timing pulse) is set small. frequency can be measured.

In the case of the =6- method of the invention, the measurement accuracy is determined mostly by the frequency of the reference pulse, and if the frequency of the reference pulse is made high enough, satisfactory measurement accuracy can be obtained.

Timing pulses can be created from reference pulses. That is, a pulse may be generated every time a predetermined number of reference pulses are counted, and this pulse may be used as a timing pulse.

As a means of executing calculations based on each count value, it is possible to use the clock pulse output within the microcomputer as a reference pulse. In this case, the timing pulse can be used as an interrupt signal to the CPU in the microcomputer, and the CPU receives this interrupt signal and executes the interrupt according to the interrupt program stored in the program memory (especially ROM). Current count Q
Take in n and Pn.

As the previous count value Pn-1, one stored in the data memory (especially RAM) in the microcomputer may be retrieved and used.

Hereinafter, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 shows an embodiment of an apparatus for carrying out the method of the present invention, and FIG. 2 shows operational waveforms A to E of essential parts thereof.

Reference numeral 1 denotes a waveform shaping circuit which shapes a pulse D generated by, for example, a pulse generator attached to a rotating shaft of an electric motor into a rectangular pulse E having a constant time width.

3 is an input pulse counting circuit which counts input pulses E after waveform shaping. 4 is a reference pulse count circuit which counts reference pulses A; Reference numerals 5 and 6 indicate latch circuits, which hold the count contents of the count circuits 3 and 4 in response to a hold command from the timing pulse B. 7 is a timer circuit, which generates a timing pulse B every time a predetermined number PT of reference pulses A is counted, and in response to this timing pulse B, the latch circuit 5.6 is activated by the count circuit 3.4. The auxiliary timing pulse C is generated with a slight time delay sufficient to maintain the count contents normally. The auxiliary timing pulse C is used as a zero clear signal for the count circuit 3. The count circuit 4 is guided by the input pulse E as a zero clear signal.

8 is a CPU, 9 is a memory, and 10 is a data exchange circuit, which are also connected to the latch circuits 5 and 6 by a common bus. The internal clock pulse output by CPU 8 is used as a reference pulse.

The timing pulse B generated by the timer circuit 7 is generated by the CPU 8.
It is also used as an interrupt signal. Upon receiving the interrupt signal B, the CPU 8 interrupts the process currently being executed and starts the latch circuit 5 at the time of generation of the timing pulse B according to an interrupt program (to be described later) stored in the program memory (Kikuni ROM) in the memory 9. .6 takes in the count contents Q, l) of the count circuits 3 and 4 held, performs predetermined arithmetic processing, and outputs a measurement output proportional to the frequency of the input pulse E to the data exchange circuit 10. 11 is a control microcomputer, for example, the motor rotation speed is controlled by DD.
It is used for control using the C method. The control microcomputer 11 takes in the contents of the data exchange circuit 10 when a measured value of the rotational speed is required.

-19= FIG. 2 shows an example of the time course of the pulse signals 4A to 4E of each part in FIG. 1.

By generating a timing pulse B every time the timer circuit 7 counts a predetermined number FT of reference pulses having a constant frequency fG, a measurement cycle of a constant time T (=Pr/f) can be generated.

Since the time point at which the auxiliary timing pulse C is generated can be considered to be substantially the same as the time point at which the timing pulse B is generated,
The content Q of the holding circuit 5 taken in by CP[J8 immediately after the end of the n-th measurement period Tn is equivalent to the number of input pulses E that have arrived within the measurement period Tn.

Let this be the current value and be expressed as Qn. Talented,
At the same time, the content P of the holding circuit 6 taken in by the CPU 8 is calculated based on the number of reference pulses generated within the time from the last input pulse (Qnth input pulse) to the end of the measurement period Tn. do. This is expressed as the current value by Pn, and the number of reference pulses generated within the corresponding time in the previous measurement period Tn-1 is expressed as the previous value by I)nl.

10- As can be seen from Fig. 2, the time from immediately after the arrival of the last input pulse within the measurement period Tnl to immediately after the arrival of the last input pulse within the measurement period Tn is (Pn-1).
-))n+PT), and the number of input pulses arriving within this time matches the number Qn of manual pulses arriving within the measuring period Tn. Therefore, by executing the calculation Qn, it is possible to obtain a measurement output that is accurately proportional to the rotational speed to be detected and the frequency of the Zunawa input pulse. This is the basic principle of the measuring method of the present invention, and according to this, measurement results can be obtained repeatedly with high accuracy in a short time and at constant time intervals T.

Furthermore, the measurement method of the present invention can be developed so that measurement output can also be obtained in a very low frequency range where the period of the input pulse exceeds the measurement period T. Of course, it is necessary to give up on maintaining the measurement time at a constant value T in such a very low frequency range.

For example, when the period T of the input pulse is longer than the period T of the timing pulse H, as shown in FIG. 3, the measured 1H force can be determined as follows. Now, the measurement period I11. There is one input pulse at i, and Q
It is assumed that the following counting results are obtained: =Qn = i, P =pn. It is assumed that a counting result of P-Po was obtained in the measurement cycle in which the manual pulse before this manual pulse arrived, and in the measurement cycle m in which no input pulse arrived between this measurement cycle and the current measurement cycle. Assume that it has existed twice. The time interval of input pulses can be measured by (Po-1-m*lPr)-Pn+PT. Therefore, using the same arithmetic expression as before, it is sufficient to substitute (Po0m PT ) as the value Pn in this expression. In other words, it is determined whether the value of the counting result Q at each time is zero, and if it is not zero, the calculation according to formula (1) is executed, and in preparation for the next calculation.

The stored value pn4 is updated to
←Pn1 +PT It is sufficient to update the stored value Pn, and at this time, the current count result Pn is ignored.

FIG. 4 is a flowchart outlining the procedure of an interrupt program stolen into the ROM in the memory 9 according to the above-described principle. The CPU 8 receives the timing pulse 13 as an interrupt signal, interrupts the currently executing process, and, according to the interrupt program, first calculates the current count content Qn of the count circuit 3.4 held by the latch circuits 5 and 6.
, Pn are sequentially read and it is determined whether Qn is zero. Qn”=;, .

When , pnl stored as 1 (JJ i and 2 in memory 9) is retrieved, the calculation is performed according to the equation (1) shown above, the calculation result is output to the data exchange circuit, and the next time The memory value Pn of the RAM in the memory 9 for the calculation of
After updating -1 to the current count tPn, the process whose execution was interrupted by the interrupt signal B is resumed, and the next interrupt signal B is waited for. When Qn=Q, a certain value P is added to the value stored in RAM in memory 9, the result is stored in RAM as a new stored value, and then the processing program is interrupted by interrupt signal B. Resumes execution.

FIG. 5 shows another embodiment of the apparatus for carrying out the present invention, and FIG. 6 shows operational waveforms of the main parts thereof.

This embodiment differs from the embodiment shown in FIG. 1 in that an input pulse count circuit 3' and a reference pulse count circuit 4' are added, and count circuits 3 and 4 are The point is that these are alternately selected and operated in pairs. In this case, the timer circuit 7 only needs to generate one series of timing pulses B.

Timing pulse B is frequency-divided by frequency divider circuit 12 . Two contradictory signals G and H obtained from the frequency dividing circuit 12
The input gates of the input pulse counting circuits 3 and 3' are controlled alternately by the input signal i. Input pulse count circuit 3, 3
The input pulse I, which has passed through the input gate of ', is used as a clear signal for the reference pulse count circuit 4.4'. Reference pulse counting circuit 4.4' receives reference pulse A via input gates controlled by opposing selection signals G, H.

The data input circuit serves to determine which counter pair is selected from one output (i, eg, H signal) of the frequency divider circuit 12.

For example, in a period in which the selection signal G is at the logic level "L" and the selection signal H is at the logic level "H", the reference pulse A
becomes the measurement pulse signal J of the count circuit 4 via the input gate, and the input pulse E after waveform shaping becomes the signal I serving as the measurement signal of the counter circuit 3 and the clear signal of the count circuit 4 via the input gate. In this case, the counting circuit 3 measures the number Q of input pulses within a certain time T,
The counter 4 measures the number P of reference pulses between the time when the input pulse immediately before the timing pulse B arrives and the time when the timing pulse B is generated. When the signal B is output from the timer circuit 7 after a certain period of time T has elapsed, the frequency divider circuit 1
The output signals G and H of 2 are inverted, the count circuits 3 and 4 are prohibited from measuring, and the prohibition of measurement of the count circuits a/ and 4/ is canceled. At this time, Ci)U receives the timing pulse B as an interrupt signal, interrupts the process currently being executed, and
Execute the υinclude program. First, data input circuit 13
0) Read the contents and determine which counter circuit is currently prohibited from measurement (The signal to be read is the counter selection signal 11 from the frequency divider circuit 12, and the logic level of this signal H is II
If L1, θ) whose measurement is currently prohibited is the counter circuits 3 and 4. ). After that, the contents of counter circuit 3 are Q
, the contents of the counter circuit 4 are taken in as Pn, and the counter circuits 3 and 4 are cleared to zero for the next measurement (clearing the counter circuit 4 to zero is not always necessary).

Then, the previous value pn1 of the counter circuit 4' stored in the RAM in the memory 8 is retrieved. The following operations are similar to those described in the embodiment of FIG. 1, and the rotational speed of a rotating machine can be detected from high speed to very low speed.

In the embodiments shown in tJX1 and FIG. 2, the CPU and memory.

Although the counter circuit is described separately, it includes the CPU and memory.

A one-chip microcontroller with counters integrated into one chip can be used. Further, the timer circuit and counter circuit portions can also be realized by a Callan LSI in which several counters are housed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an apparatus for carrying out the method of the present invention, FIGS. 2 and 3 are operational waveform diagrams for explaining the operation of the embodiment of FIG. 1, and FIG. 1 is a flowchart showing an outline of the procedure of the interrupt program in the embodiment of FIG. 1, FIG. 5 is a block diagram showing another embodiment of the apparatus for carrying out the method of the present invention, and FIG. FIG. 3 is a waveform diagram for explaining the operation of the embodiment. ]...Waveform shaping circuit, 3.3'...Input pulse count circuit, 4.4'...Reference pulse count circuit, 5
゜6...Latch circuit, 7...Timer circuit, 8...
CPU19...memory, 10...data exchange circuit,
11... Control microcomputer. =17-i1 times 72 Figure 73 times T-gar 17x

Claims (1)

[Claims] 1) In a pulse frequency measurement method for deriving an amount of dejiggling proportional to the frequency of an incoming input pulse, a reference pulse having a constant high frequency (fo) and a constant period α are used.
), and the number of input pulses (Q) that arrive within a certain period of time between two temporally adjacent timing pulses, and The number (P) of reference pulses generated up to the timing pulse generation time is measured, and at each timing pulse generation time, the current measured value Qn of the number q of input pulses and the number of reference pulses are calculated. From the current measurement value Pn of (P) and the previous measurement value P.-1, perform the calculation '``n-1''n 0PT (where k is a constant, PT = fo・T is a constant). A method for measuring pulse frequency, characterized in that the calculation result is output. A pulse frequency measuring method patented in that the pulse has a frequency proportional to the power velocity 1. 3) The method according to claim 1 or 2 (Koi-C1) The timing pulse is a reference pulse. A pulse frequency measuring method characterized in that the pulse frequency is a pulse having a constant period (11) generated at jFf- for measuring a predetermined number (PT). 4) Chair phase according to claims 1 to 3. 3. The pulse frequency measuring method according to claim 1, wherein step (1) is performed using a microcomputer. 5) A pulse frequency measuring method according to claim 4, characterized in that an internal clock pulse of a microcomputer is used as a reference pulse.