JPS5838694A - Solder for semiconductor die bonding - Google Patents

Solder for semiconductor die bonding

Info

Publication number
JPS5838694A
JPS5838694A JP13677181A JP13677181A JPS5838694A JP S5838694 A JPS5838694 A JP S5838694A JP 13677181 A JP13677181 A JP 13677181A JP 13677181 A JP13677181 A JP 13677181A JP S5838694 A JPS5838694 A JP S5838694A
Authority
JP
Japan
Prior art keywords
solder
semiconductor
die bonding
semiconductor die
elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13677181A
Other languages
Japanese (ja)
Other versions
JPS6335359B2 (en
Inventor
Hiroyuki Baba
博之 馬場
Osamu Kodan
小段　修
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP13677181A priority Critical patent/JPS5838694A/en
Publication of JPS5838694A publication Critical patent/JPS5838694A/en
Publication of JPS6335359B2 publication Critical patent/JPS6335359B2/ja
Granted legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/268—Pb as the principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To improve the wettability between solder and base plates disposed with elements and to eliminate the variance in the joining state to the semiconductor elements by forming solder of a comps. consisting basically of Pb and contg. specific contents of Cu, Sn. CONSTITUTION:Solder for semiconductor die bonding is formed of a compsn. consisting basically of Pb contg. 0.4-1.7% Cu and <=17% Sn. If the content of Cu is out of said range, the variance in the state of joining to semiconductor elements increases and some of elements break down. If Sn is added in excess as much as 17%, the effect thereof saturates.

Description

【発明の詳細な説明】 この発明は半導体グイボンディング用のはんだＣ：関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to solder C for semiconductor bonding.

例えば金属キャン封止タイプのパワートランジスタ等の
半導体装置におけるグイボンディング部の構成は１ｉ１
５！Ｑ（：示されるようＣ二なっている。図（二おける
（１）はニッケルめっき（１１）表面をもつ素子配役基
台、（２）は半導体素子、（３）は前記素子配設基台（
１）と半導体素子（２）との間を接合するはんだ層であ
る。そして、上記はんだ接合４二は素子配設基台（１）
の上面に円形または方形に成形されたはんだシートを介
して半導体ダイを載せ、水素雰囲気の加熱炉中な通過さ
せて接合を施していた。上記に用いられているはんだ材
は一般にＰｂ−ｆ９ｍ　、　Ｐｂ−８ｍ−ムｇ。For example, the configuration of the Gui bonding part in a semiconductor device such as a metal can sealing type power transistor is 1i1
5! Q(: C2 as shown. In Figure 2, (1) is the element mounting base with a nickel-plated (11) surface, (2) is the semiconductor element, and (3) is the element mounting base. (
1) and the semiconductor element (2). The solder joint 42 is connected to the element mounting base (1).
A semiconductor die was mounted on the top surface of the die via a circular or rectangular solder sheet, and the die was passed through a heating furnace in a hydrogen atmosphere to perform bonding. The solder materials used above are generally Pb-f9m and Pb-8m-g.

Ｆｂ−１−等であるが、いずれもニッケルとのなじみが
わるいことから第２ＷＡＥ二示すようにはんだ層（３）
白しボイド（４）ｊ　（４’）−・・を庄じたり、第３
図に示すように接合の大部ｉ＞＃（５つを生じたりなど
して熱抵抗が大きくばらつき、放熱特性がわるい。特（
二自動組立の場合には加熱時間も短かく、修理も不能で
あるため影響が大きいので、なじみの良いはんだとして
８トム璽、　１１ｍ−８ｋ　、　８ａ−Ｉ思、８トムｇ
等の８ｆｉ系はんだがあるが、上記Ｐｂ系のはんだに比
して硬く、第４図に示すような締付評価を行なうと半導
体素子の破損が多い傾向にある。なお、上記締付評価を
示す図において、（６）はピアノ線でこれを挾んで素子
配設基台を締めつけることＣ二よって強度を評価するよ
うになっている。さらζ二、Ｐｂ−８２１−Ａｌｌはん
だがあり、これはなじみが良い上（；耐締付性もすぐれ
るが非常（−高価である欠点のため実用的でない。Fb-1-, etc., but since they have poor compatibility with nickel, the solder layer (3) shown in the second WAE 2 is used.
The white void (4)j (4')-... is created, and the third
As shown in the figure, most of the junctions have i>#(5), resulting in large variations in thermal resistance and poor heat dissipation characteristics.
In the case of two-automatic assembly, the heating time is short and repair is impossible, which has a large effect, so 8 tom g, 11m-8k, 8a-I, and 8 tom g are used as solders with good compatibility.
There are 8fi type solders such as 8fi type solders, but they are harder than the above Pb type solders and tend to cause more damage to semiconductor elements when performing a tightening evaluation as shown in FIG. In the diagram showing the above-mentioned tightening evaluation, (6) is to evaluate the strength by tightening the element mounting base by sandwiching it with piano wire (C2). Furthermore, there is Pb-821-All solder, which has good compatibility and excellent tightening resistance, but is not practical due to its high price.

この発明は叙上の従来の欠点に鑑みてなされたもので、
半導体グイボンディング用に適するはんだとしてＣｕが
α４〜１．７％、　８ｍが１７％以下含まれたＰｂベー
スのはんだを提供する。This invention was made in view of the conventional drawbacks mentioned above.
To provide a Pb-based solder containing Cu in α4 to 1.7% and 8m in 17% or less as a solder suitable for semiconductor bonding.

以下に本発明を１実施例につき詳細に説明する。The present invention will be explained in detail below with reference to one embodiment.

素子配役基台のニッケルめっきされた表面に半導体素子
をはんだ接合するのＣ二側いるはんだにＰｂ−８ｎ（８
ａｌＱ％）はんだ、Ｐｂ−８１１−Ｃｕ　（８ｍ　１０
％、Ｃｕ　Ｑ、ｉ　ｐＯ，２、０，４、０，６、０，９
、１，２、１，４、１，７、２，０％）はんだ、ａｎ−
８ｂ（８ｂｌＯ％）はんだ等（いずれも８ｎ系はんだ）
を用いて接合性（ｍれ性）、放熱特性、締付評価を行な
った。まず、濡れ性においてＰｂ−８ｍはんだ、および
Ｃｕ含量の少ない（特４ニー　０．１５％未満）　Ｐｂ
−８ｎはんだは劣り、第５図（ａ）　ｇ：示すようにボ
ール状のはんだα謙になったり、さらζ二ははんだと素
子配設基台とが接着していないため半導体素子を接合す
る前（二素子配設晟台から落ちてしまう現象を生じた。When soldering the semiconductor element to the nickel-plated surface of the element mounting base, Pb-8n (8
alQ%) solder, Pb-811-Cu (8m 10
%, Cu Q, i pO, 2, 0, 4, 0, 6, 0, 9
, 1,2, 1,4, 1,7, 2,0%) solder, an-
8b (8blO%) solder, etc. (both 8n solder)
Bondability (male resistance), heat dissipation characteristics, and tightening were evaluated using the following. First, in terms of wettability, Pb-8m solder and Pb with low Cu content (less than 0.15%)
-8n solder is inferior, and as shown in Figure 5 (a) g, the ball-shaped solder α is weak, and ζ2 is difficult to bond the semiconductor element because the solder and the element mounting base are not bonded. Previous: A phenomenon occurred where the device fell from the stand with two elements installed.

また、Ｃｏが２％以上含有されると濡れ性は良好なるも
融点の高い８ｎ　Ｃｏ合金ができ、接合時≦二素子配設
基台と半導体素子との間に異物状に介在する塊状の８ｎ
−Ｃｕ合金（ハ）となって、ｉｓ５図（ｂ）≦二示すよ
うに均一性が失なわれるものが多発した。なお、８ｎ−
８ｂ　（８ｂ　１０％）はんだ等の８ｎ系はんだ≦二は
上記のようなｓｕｉはなかった。In addition, when Co is contained in an amount of 2% or more, an 8n Co alloy with good wettability but a high melting point is formed, and when bonding ≦ a lump of 8n intervening as a foreign substance between the two-element mounting base and the semiconductor element is formed.
-Cu alloy (c), and there were many cases where the uniformity was lost as shown in is5 (b)≦2. In addition, 8n-
8n-based solder such as 8b (8b 10%) solder≦2 did not have the above-mentioned sui.

次Ｃ二、放熱特性を示す熱抵抗値についてみると、上記
濡れ性の良かったＣａ　ｆ　０．４〜１７％含有するＰ
ｂ−４＋ａはんだと１鳳系はんだ線第６図（畠）に示す
ようにばらつきも少なく良好であったが、Ｃｍの含有量
が上記含有範囲を外れると第６図（ｂ）に示すように、
非常にばらつきが大きく破壊するものが発生した。Next C2: Looking at the thermal resistance value, which indicates heat dissipation characteristics, the above-mentioned P containing 0.4 to 17% of Ca f had good wettability.
As shown in Figure 6 (Hata), the b-4+a solder and 1 tung-based solder wire were good with little variation, but when the Cm content was outside the above content range, as shown in Figure 6 (b). ,
There were cases of very large variations and destruction.

次４＝は半導体装置を放熱＠＜二取付けるとき問題しな
る締付評価における半導体素子の耐クラツク性について
みると、８膳系はんだは不良率が１０〜５０％と高率を
示すが上記実施例のはんだにおいてはほとんど０％で間
層がなかった。さらζ二はんだ中６＝占める８膳Φ量を
増加しても１７鴨を超えない範囲で有効であることがわ
かった。Next 4= is a problem when mounting semiconductor devices for heat dissipation@<2 Looking at the crack resistance of semiconductor elements in the tightening evaluation, 8-piece solder shows a high defect rate of 10 to 50%, but the above implementation In the example solder, it was almost 0% and there was no interlayer. Furthermore, it was found that even if the amount of Φ occupied by 6 = 8 in the ζ2 solder was increased, it was effective within the range of not exceeding 17 solders.

また、他の実施例としてａｍを１７嘔以下含有する下記
の各はんだＰｂ−８鳳−々はんだ、Ｐｂ−８ｎ−Ｉｎ　
　はんだ、Ｐｂ−８ａ−ｆｉｂはんだ、Ｐｂ−５１ｎ−
Ｂｉはんだ等（：ＣｕをＱ、４〜Ｌ７％の範囲内で含有
させても同様の効果が認められた。In addition, as other examples, each of the following solders containing 17 or less am, Pb-8n-In solder, Pb-8n-In
Solder, Pb-8a-fib solder, Pb-51n-
A similar effect was observed even when Bi solder, etc. (:Cu) was contained within the range of Q, 4 to L 7%.

叙↓の如くはんだと素子配設基台との濡れ性が良い上４
：、半導体素子との接合状態のばらつきも少なくできる
ので、工程の自動化を容具にする利点もある。また、Ｐ
ｂ系はんだであるためはんだが軟かく締付峙（：おける
半導体素子のクラックもなく、しかもム■やＡｇ等の貴
金属を含まないので廉価である利点もある。4. Good wettability between the solder and the element mounting base as shown in the diagram below.
: Since variations in the bonding state with semiconductor elements can be reduced, there is also the advantage of facilitating process automation. Also, P
Since it is a b-based solder, the solder is soft and does not cause cracks in the semiconductor element during tightening, and it also has the advantage of being inexpensive because it does not contain precious metals such as aluminum and Ag.

【図面の簡単な説明】[Brief explanation of the drawing]

５３１図は半導体ダイボンディングを説明するための一
部の断面図、第２図ははんだ層中のボイドな示す断面図
、第３図ははんだ層の状態を示す断面図、５４４図は半
導体装置の締付評価を説明するための断面図、第５図（
ａ）　＃　（ｂ）はいずれもＣｍを含むはんだの状態を
示す断面図、第６図（ａ）　ｔ　（ｂ）は熱抵抗値の分
布を示す線図である。 １　　　　　素子配設基台 ｌａ　　　　　　　素子配設基台表面のニッケルめっき
層２　　　　　半導体素子 ３．１３　　　はんだ層 代理人　弁理士　井　上　−男 第１図 第　　５　　図 （ａ） （１４ン 第　　６　　図　　　　　　　　（（２）イ固＆−Figure 531 is a partial cross-sectional view for explaining semiconductor die bonding, Figure 2 is a cross-sectional view showing voids in the solder layer, Figure 3 is a cross-sectional view showing the state of the solder layer, and Figure 544 is a cross-sectional view of a semiconductor device. Cross-sectional view for explaining tightening evaluation, Figure 5 (
a) #(b) are cross-sectional views showing the state of solder containing Cm, and FIGS. 6(a) and 6(b) are diagrams showing the distribution of thermal resistance values. 1 Element placement base la Nickel plating layer on the surface of the element placement base 2 Semiconductor element 3.13 Solder layer agent Patent attorney Inoue - Male Figure 1 Figure 5 (a) (14 Figure 6 (( 2) Igoku&-

Claims (1)

【特許請求の範囲】[Claims] Ｃｏを０．４〜１．７％、８ｓｔを１７％以下含有する
Ｐｂベースの半導体グイボンディング用はんだ。A Pb-based solder for semiconductor bonding containing 0.4 to 1.7% Co and 17% or less of 8st.
JP13677181A 1981-08-31 1981-08-31 Solder for semiconductor die bonding Granted JPS5838694A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13677181A JPS5838694A (en) 1981-08-31 1981-08-31 Solder for semiconductor die bonding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13677181A JPS5838694A (en) 1981-08-31 1981-08-31 Solder for semiconductor die bonding

Publications (2)

Publication Number Publication Date
JPS5838694A true JPS5838694A (en) 1983-03-07
JPS6335359B2 JPS6335359B2 (en) 1988-07-14

Family

ID=15183124

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13677181A Granted JPS5838694A (en) 1981-08-31 1981-08-31 Solder for semiconductor die bonding

Country Status (1)

Country Link
JP (1) JPS5838694A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59183993A (en) * 1983-04-04 1984-10-19 Hitachi Ltd Brazing structure
JPS60166192A (en) * 1984-02-07 1985-08-29 Furukawa Electric Co Ltd:The High melting point solder
EP0198353A2 (en) * 1985-04-12 1986-10-22 International Business Machines Corporation Lead base alloys and their application for reducing electromigration activity
JPS63127501A (en) * 1986-11-17 1988-05-31 株式会社　サト−セン Overloard fusing type resistor
CN111448643A (en) * 2018-01-24 2020-07-24 三菱综合材料株式会社 Bonding layer of semiconductor module, semiconductor module and manufacturing method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4998358A (en) * 1973-01-25 1974-09-18
JPS55158485U (en) * 1979-04-27 1980-11-14

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4998358A (en) * 1973-01-25 1974-09-18
JPS55158485U (en) * 1979-04-27 1980-11-14

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59183993A (en) * 1983-04-04 1984-10-19 Hitachi Ltd Brazing structure
JPS60166192A (en) * 1984-02-07 1985-08-29 Furukawa Electric Co Ltd:The High melting point solder
JPS6216748B2 (en) * 1984-02-07 1987-04-14 Furukawa Electric Co Ltd
EP0198353A2 (en) * 1985-04-12 1986-10-22 International Business Machines Corporation Lead base alloys and their application for reducing electromigration activity
JPS61238932A (en) * 1985-04-12 1986-10-24 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Reduction of activity of electrophoresis
JPH0327317B2 (en) * 1985-04-12 1991-04-15 Intaanashonaru Bijinesu Mashiinzu Corp
JPS63127501A (en) * 1986-11-17 1988-05-31 株式会社　サト−セン Overloard fusing type resistor
CN111448643A (en) * 2018-01-24 2020-07-24 三菱综合材料株式会社 Bonding layer of semiconductor module, semiconductor module and manufacturing method thereof

Also Published As

Publication number Publication date
JPS6335359B2 (en) 1988-07-14

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