JPS60143636A - Electronic component parts - Google Patents

Electronic component parts

Info

Publication number
JPS60143636A
JPS60143636A JP14052584A JP14052584A JPS60143636A JP S60143636 A JPS60143636 A JP S60143636A JP 14052584 A JP14052584 A JP 14052584A JP 14052584 A JP14052584 A JP 14052584A JP S60143636 A JPS60143636 A JP S60143636A
Authority
JP
Japan
Prior art keywords
copper
lead frame
thin films
nickel
films
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14052584A
Other languages
Japanese (ja)
Inventor
Tomio Yamada
富男 山田
Kunio Tsushima
津島　邦夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP14052584A priority Critical patent/JPS60143636A/en
Publication of JPS60143636A publication Critical patent/JPS60143636A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To obtain a low-price electronic component parts, lead frame, which has superior bonding properties for mounting to a semiconductor chip, by a method wherein nickel thin films or alloy thin films of the nickel family is coated on one main surface of a substrate having been mainly made with copper, copper thin films of a specific thickness are coated thereon, and the semiconductor chip is mounted thereon through silver films. CONSTITUTION:A lead frame 1 is formed by superposing nickel thin films 3, 0.3-3.5mum thick copper thin films 4 and silver films 5 on a substrate 2 consisting of a copper or an alloyed sheet having been mainly made with copper by a plating method, etc. The lead frame 1 constituted in such a way has been made to interpose the nickel thin films 3 and the copper thin films 4, both having an excellent adhesion, between the substrate 2 and the silver films 5 when the silver films 5 are provided on the substrate 2. Accordigly, when this lead frame 1 is soldered to a semiconductor chip in the mounting and assembling process, the lead frame 1 and the semiconductor chip can be completely fixed together with the excellent soldering properties (excellent adhesion) of the lead frame 1 even though the soldering is performed under a high-temperature treatment of more than 400 deg.C. Moreover, as the copper thin films 4 are available at a cost lower than the thin films of a gold material, there is no possibility at all that the cost of the lead frame 1 is raised.

Description

【発明の詳細な説明】 本発明は、半導体装置等の電子部品に関する。[Detailed description of the invention] The present invention relates to electronic components such as semiconductor devices.

半導体装置のうち特にパワーＩＣ，パワートランジスタ
などに用いられるリードフレームとしては、熱伝導度の
良好な銅または銅を主成分とする合金体を基材とし、こ
れにボンダビリティの良好な銀メッキを施すことが考え
られている。例えば、特開昭５０−４７５６６号公報に
開示されてい名。Lead frames used in semiconductor devices, especially power ICs and power transistors, are made of copper or a copper-based alloy with good thermal conductivity, and are coated with silver plating with good bondability. It is considered to be implemented. For example, the name disclosed in Japanese Patent Application Laid-Open No. 50-47566.

しかしながらこの種のリードフレームにＩＣチップまた
はトランジスタチツプなどの半導体チップをグイボンデ
ィングする際は、金−シリコン共晶合金を用いて４３０
　’Ｃ前後の加熱によって行なう（１） ために、リードフレームの銅が共晶合金層内やＩＣチッ
プまたはトランジスタチップ内に多量に侵入してこれら
のチップにクラックが発生したりチップを破損したりす
る問題がある。これを避けるために銅を主成分とする基
体にニッケルメッキ薄膜あるいはニッケル薄膜と金スト
ライク薄膜を重畳した薄膜を介して銀メッキを施して改
善することが考えられる。しかし前者のリードフレーム
すなわちニッケルメッキ薄膜を介在したものは、チップ
のボンダビリティが悪く、また実装畦立−「程でのリー
ドのはんだ付性すなわち密着性が悪くなり、。However, when bonding a semiconductor chip such as an IC chip or a transistor chip to this type of lead frame, gold-silicon eutectic alloy is used.
Because this is done by heating before and after C (1), a large amount of copper from the lead frame may penetrate into the eutectic alloy layer or into the IC chip or transistor chip, causing cracks or damage to these chips. There is a problem. In order to avoid this problem, it may be possible to improve the problem by applying silver plating to a substrate mainly composed of copper through a thin nickel plating film or a thin film formed by superimposing a thin nickel film and a thin gold strike film. However, the former lead frame, that is, one with a thin nickel plating film, has poor chip bondability and poor solderability, or adhesion, of the leads at the point where the mounting ridges form.

実装組立装置の仕様を変更したり窒素ガス等の不活性ガ
ス中にて実装組立作業を行なう必要がある等の欠点があ
る。また後者のリードフレームすなわちニッケルメッキ
薄膜と金ストライク薄膜を重畳した薄膜を介在したもの
は、上述した諸欠点が解決されるのに反し、高価な金を
用いることよりリードフレームのコストが高いものとな
る欠点を有する。There are disadvantages such as the need to change the specifications of the mounting and assembly equipment and to perform the mounting and assembly work in an inert gas such as nitrogen gas. In addition, although the latter type of lead frame, that is, one with a thin film in which a nickel plating thin film and a gold strike thin film are superimposed, solves the above-mentioned drawbacks, the cost of the lead frame is high due to the use of expensive gold. It has some drawbacks.

それゆえ本発明の目的は、上述した欠点を解決（２） した安価でかつ半導体チップのボンディング性が良好な
電子部品を提供することにある。Therefore, an object of the present invention is to provide an electronic component which solves the above-mentioned drawbacks (2) and is inexpensive and has good bonding properties for semiconductor chips.

このような目的を達成するために本発明においては、銅
を主成分とする基体−主面にニッケル薄膜またはニッケ
ル系合金薄膜が被覆され、その薄膜上に厚さ０．３〜３
．５μ拍の銅膜が被覆され、そしてその銅膜」二に銀膜
を介して半導体チップが取りつけられていることを特徴
としている。In order to achieve such an object, in the present invention, a nickel thin film or a nickel-based alloy thin film is coated on the main surface of a substrate mainly composed of copper, and a nickel-based alloy thin film is coated on the thin film to a thickness of 0.3 to 3.
．． It is characterized in that it is coated with a 5μ thick copper film, and a semiconductor chip is attached to the copper film through a silver film.

以下、本発明にかかる実施例を用いて具体的に説明する
。Hereinafter, the present invention will be specifically explained using examples.

第１図は、本発明の一実施例であるパワーＩＣのリード
フレームの平面図、第２図は、第１図のＡ−Ａ’切断面
の要部の拡大断面図である。同図において、１は、一連
のリードフレームである。FIG. 1 is a plan view of a lead frame of a power IC according to an embodiment of the present invention, and FIG. 2 is an enlarged sectional view of a main part taken along the line AA' in FIG. In the figure, 1 is a series of lead frames.

本発明にかかるリードフレーム１は、銅または銅を主成
分とする合金体からなる基体（２００〜５００μｍ）２
に１〜４μｍｎのニッケル薄膜３がメッキなどにより被
覆され、このニッケル薄膜３表面＋：　０　、３〜３．
５μｍの銅薄膜４が形成され、この銅薄膜４表面に４〜
１４μｍの銀膜５が設けられ（３） たものである。これらの膜すなわちニッケル薄膜３、銅
薄膜４、銀膜５は、メッキ法などにより容易かつ簡単に
銅を主成分とする基体１．−１＝に重畳して形成するこ
とができる。The lead frame 1 according to the present invention has a base (200 to 500 μm) 2 made of copper or an alloy mainly composed of copper.
A thin nickel film 3 of 1 to 4 μm is coated by plating or the like, and the surface of this thin nickel film 3 is +: 0, 3 to 3.
A copper thin film 4 with a thickness of 5 μm is formed, and on the surface of this copper thin film 4 4~
A 14 μm silver film 5 was provided (3). These films, ie, the nickel thin film 3, the copper thin film 4, and the silver film 5, can be easily and easily deposited on the substrate 1, which has copper as its main component, by a plating method or the like. It can be formed by being superimposed on −1=.

したがって本発明にかかるリードフレーム１は、熱伝導
度の良好な銅を主成分とした基体２であるために、放熱
性が良い。また、この基体２上にボンダビリティ並びに
熱伝導度の良好な銀膜５を設ける際、密着性のよいニッ
ケル薄膜３および銅薄膜４をそれらの間に介在させてい
る。そのために、このリードフレーム１のグイにＩＣチ
ップ（シリコンベレット）を金−シリコン集品合金を用
いてグイボンディングする際、基体２の銅がこの共晶合
金内やシリコンベレット内に侵入しようとするとニッケ
ル薄膜３によってブロックできる。したがって本発明に
かかるリードフレームは、グイボンディングの際、基体
２の銅によりシリコンベレットすなわもＩＣチップにク
ラックが発生したり破損したりすることがない。なお、
本発明にかがるリードフレーム１においては、銀膜５下
に銅薄膜（４） ４があり、これより金−シリコン集品合金やシリコンベ
レットに銅が侵入するが、上記銅薄膜４を０．３〜３．
５μｍとすることにより、その侵入量がわずかとなり、
シリコンペレットにクラックや破損を生じさせるまでに
は到らない。Therefore, the lead frame 1 according to the present invention has good heat dissipation because the base body 2 is mainly made of copper which has good thermal conductivity. Further, when the silver film 5 having good bondability and thermal conductivity is provided on the substrate 2, a nickel thin film 3 and a copper thin film 4 having good adhesion are interposed therebetween. Therefore, when bonding an IC chip (silicon pellet) to the lead frame 1 using a gold-silicon alloy, if the copper of the base 2 tries to penetrate into the eutectic alloy or the silicon pellet, It can be blocked by the nickel thin film 3. Therefore, in the lead frame according to the present invention, the silicon pellet or the IC chip will not be cracked or damaged by the copper of the base 2 during bonding. In addition,
In the lead frame 1 according to the present invention, there is a copper thin film (4) 4 under the silver film 5, and copper penetrates into the gold-silicon aggregate alloy and silicon pellet from this. .3-3.
By setting it to 5μm, the amount of penetration is small,
It does not reach the level of causing cracks or damage to the silicon pellets.

また、本発明にかかるリードフレーム１は、銀膜５下に
銅薄膜を有するものであるために、実装組立工程におい
てこのリードをはんだ付けする際、４００℃以上の高温
処理にて行なっても良好なはんだ付は性（良好な密着性
）をもって完全にそれらを固着することができる。この
はんだ付は性を従来のリードフレーム（銅を基材とし、
これにニッケル薄膜を介してボンダビリティの良好な銀
メッキ膜を被覆したもの）と比較してみると下表のよ（
５） なお、」二表において、はんだ付は性の判定条件として
は、はんだとして鉛４０％とスズ６０％の組成のもので
ロジンを７ラツクスとして使用し、ディップ時間は１回
にっ鯵５秒間とし、このディップ作業を１回〜７回まで
ｌｌｉ次繰り返し行なって、それぞれにおいてはんだ濡
れ面積が９５％以−１二のものを良品とし、８５〜９５
％のものを普通品とし、８５％未満のものを不良品とす
るものである。そしてこの銅薄膜４は、従来の金薄膜に
かわるものであるが、金材料に比して極めて安価なもの
であるためにリードフレーム１のコストをあげることは
ない。Furthermore, since the lead frame 1 according to the present invention has a thin copper film under the silver film 5, it is possible to solder the leads in the mounting assembly process even if the process is performed at a high temperature of 400°C or higher. Good soldering can fix them perfectly with good adhesion. This soldering is similar to traditional lead frames (copper based,
Comparing this with a silver plating film with good bondability via a nickel thin film, the table below shows (
5) In addition, in Table 2, the conditions for determining the soldering properties are that the solder has a composition of 40% lead and 60% tin, the rosin is used at 7 lux, and the dipping time is 1 time. This dipping process was repeated 1 to 7 times, and those with a solder wet area of 95% or more in each case were considered good, and 85 to 95.
% is considered an ordinary product, and anything less than 85% is considered a defective product. The copper thin film 4 replaces the conventional gold thin film, but it does not increase the cost of the lead frame 1 because it is much cheaper than gold materials.

本発明にかかるリードフレーム１は、上述したリードフ
レーム１におけるニッケル薄膜３のかわりに、Ｎｉの合
金メッキ膜リン（Ｐ）を含有したニッケル薄膜（無電解
メッキ法にて形成できるもの）、スズ（Ｓｎ）またはコ
バル）（Ｃｏ）を含有したニッケル薄膜（硬質のリード
フレームが得られる）、ボロン（Ｂ）を含有したニッケ
ル薄膜（はんだ付は性がより改善できる）を用いること
ができる。In the lead frame 1 according to the present invention, instead of the nickel thin film 3 in the lead frame 1 described above, a nickel thin film containing phosphorus (P), a Ni alloy plating film (which can be formed by an electroless plating method), and a tin ( A nickel thin film containing Sn) or cobal (Co) (which can yield a hard lead frame), and a nickel thin film containing boron (B) (which can further improve solderability) can be used.

（６） 本発明にかかる電子部品の外部リードは、上述したパワ
ーＩＣのリードフレームに限定されず、種々の態様の半
導体装置、ハイブリッド素子などの電子部品に用いる外
部リードに適用できるものである。(6) The external lead for an electronic component according to the present invention is not limited to the power IC lead frame described above, but can be applied to external leads used in various types of semiconductor devices, hybrid devices, and other electronic components.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は、本発明にかかるパワーＩＣのリードフレーム
を示す平面図、第２図は、第１図のＡ−Ａ’切断面の要
部の拡大断面図である。 １・・・リードフレーム、２・・・銅を主成分とする基
体、３・・・ニッケル薄膜、４・・・銅薄膜、５・・・
銀膜。 代理人　弁理士　高橋　明夫 （７） 第２図FIG. 1 is a plan view showing a lead frame of a power IC according to the present invention, and FIG. 2 is an enlarged sectional view of a main part taken along the line AA' in FIG. DESCRIPTION OF SYMBOLS 1... Lead frame, 2... Substrate containing copper as a main component, 3... Nickel thin film, 4... Copper thin film, 5...
silver film. Agent Patent Attorney Akio Takahashi (7) Figure 2

Claims (1)

【特許請求の範囲】[Claims] 銅を主成分とする基体−主面に二ンケル薄膜またはニッ
ケル系合金薄膜が被覆され、その薄膜」二ニ厚さ０．３
〜３．５μｍの銅膜が被覆され、そしてその銅膜上に銀
膜を介して半導体チップが取りつけられていることを特
徴とする電子部品。Substrate whose main component is copper - The main surface is coated with a Ni-Nkel thin film or a nickel-based alloy thin film, and the thin film has a thickness of 0.3
An electronic component characterized by being coated with a copper film of ~3.5 μm and having a semiconductor chip mounted on the copper film via a silver film.
JP14052584A 1984-07-09 1984-07-09 Electronic component parts Pending JPS60143636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14052584A JPS60143636A (en) 1984-07-09 1984-07-09 Electronic component parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14052584A JPS60143636A (en) 1984-07-09 1984-07-09 Electronic component parts

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP6655376A Division JPS6034265B2 (en) 1976-06-09 1976-06-09 electronic components

Publications (1)

Publication Number Publication Date
JPS60143636A true JPS60143636A (en) 1985-07-29

Family

ID=15270692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14052584A Pending JPS60143636A (en) 1984-07-09 1984-07-09 Electronic component parts

Country Status (1)

Country Link
JP (1) JPS60143636A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6245448B1 (en) * 1988-03-28 2001-06-12 Texas Instruments Incorporated Lead frame with reduced corrosion
US6864579B2 (en) * 2001-01-25 2005-03-08 Siemens Aktiengesellschaft Carrier with a metal area and at least one chip configured on the metal area

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52149973A (en) * 1976-06-09 1977-12-13 Hitachi Ltd External lead of electronic parts

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52149973A (en) * 1976-06-09 1977-12-13 Hitachi Ltd External lead of electronic parts

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6245448B1 (en) * 1988-03-28 2001-06-12 Texas Instruments Incorporated Lead frame with reduced corrosion
US6864579B2 (en) * 2001-01-25 2005-03-08 Siemens Aktiengesellschaft Carrier with a metal area and at least one chip configured on the metal area

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