JPS60143637A - Electronic component parts - Google Patents
Electronic component partsInfo
- Publication number
- JPS60143637A JPS60143637A JP14052684A JP14052684A JPS60143637A JP S60143637 A JPS60143637 A JP S60143637A JP 14052684 A JP14052684 A JP 14052684A JP 14052684 A JP14052684 A JP 14052684A JP S60143637 A JPS60143637 A JP S60143637A
- Authority
- JP
- Japan
- Prior art keywords
- copper
- lead frame
- thin films
- nickel
- films
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は、半導体装置等の電子部品に関する。[Detailed description of the invention] The present invention relates to electronic components such as semiconductor devices.
半導体装置のうち特にパワーＩＣ，パワートランジスタ
などに用いられるリードフレームとしては、熱伝導度の
良好な銅または銅を主成分とする合金体を基材とし、こ
れにボングビリティの良好な銀メッキを施すことが考え
られている。例えば、特開昭５０−４７５６６号公報に
開示されている。Lead frames used in semiconductor devices, especially power ICs and power transistors, are made of copper or a copper-based alloy with good thermal conductivity, and are coated with silver plating with good bongability. It is considered to be implemented. For example, it is disclosed in Japanese Patent Application Laid-Open No. 50-47566.
しかしながらこの種のリードフレームにＩＣチップまた
はトランジスタチップなどの半導体チップをグイボンデ
ィングする際は、金−シリコン共晶合金を用いて４３０
℃前後の加熱によって行なう（１）
ために、リードフレームの銅が共晶合金層内やＩＣチッ
プまたはトランジスタチップ内に多量に侵入してこれら
のチップにクランクが発生したりチップを破損したりす
る問題がある。これを避けるために銅を主成分とする基
体にニッケルメンキ薄膜あるいはニッケル薄膜と金スト
ライク薄膜を重畳した薄膜を介して銀メッキを施して改
善することが考えられる。しかし前者のリードフレーム
すなわ私ニッケルメッキ薄膜を介在したものは、チップ
のボングビリティが悪く、また実装組立工程でのり−ド
のはんだ付性すなわち密着性が悪くなり、実装組立装置
の仕様を変更したり窒素ガス等の不活性ガス中にて実装
組立作業を行なう必要がある等の欠点がある。また後者
のリードフレームすなわちニッケルメッキ薄膜と金スト
ライク薄膜を重畳した薄膜を介在したものは、−ｆ、述
した諸欠点が解決されるのに反し、高価な金を用いるこ
とよりリードフレームのコストが高いものとなる欠点を
有する。However, when bonding a semiconductor chip such as an IC chip or a transistor chip to this type of lead frame, gold-silicon eutectic alloy is used.
Because this is done by heating around ℃ (1), a large amount of copper from the lead frame penetrates into the eutectic alloy layer and into the IC chip or transistor chip, causing cranks or damage to these chips. There's a problem. In order to avoid this problem, it may be possible to improve this by applying silver plating to a substrate mainly composed of copper through a nickel coating thin film or a thin film formed by superimposing a nickel thin film and a gold strike thin film. However, with the former lead frame, which has a nickel plating thin film interposed, the chip's bondability is poor and the solderability, or adhesion, of the glue during the mounting and assembly process is poor, so the specifications of the mounting and assembly equipment have to be changed. However, there are drawbacks such as the need to carry out mounting and assembly work in an inert gas such as nitrogen gas. Furthermore, the latter type of lead frame, that is, one with a thin film in which a nickel plating thin film and a gold strike thin film are superimposed, solves the above-mentioned drawbacks, but the cost of the lead frame is lower due to the use of expensive gold. It has the disadvantage of being expensive.
それゆえ本発明の目的は、」二連した欠点を解決（２）
した安価でかつ半導体チップのボンディング性が良好な
電子部品を提供することにある。Therefore, an object of the present invention is to provide an electronic component which is inexpensive and has good bonding properties for semiconductor chips, which solves the two problems (2).
このような目的を達成するために本発明においては、銅
を主成分とする基体−主面にニッケルースズ合金薄膜が
被覆され、その薄膜」二に銅膜が被覆され、そしてその
銅膜上に銀膜を介して半導体チップが取りつけられてい
ることを特徴としている。In order to achieve such an object, in the present invention, a nickel-tin alloy thin film is coated on the main surface of a substrate containing copper as a main component, a copper film is coated on the thin film, and a silver film is coated on the copper film. It is characterized by a semiconductor chip attached through a membrane.
以下、本発明にかかる実施例を用いて具体的に説明する
。Hereinafter, the present invention will be specifically explained using examples.
第１図は、本発明の一実施例であるパワーＩＣのリード
フレームの平面図、第２図は、第１図のＡ−Ａ’切断面
の要部の拡大断面図である。同図において、１は、一連
のリードフレームである。FIG. 1 is a plan view of a lead frame of a power IC according to an embodiment of the present invention, and FIG. 2 is an enlarged sectional view of a main part taken along the line AA' in FIG. In the figure, 1 is a series of lead frames.
本発明にかかるリードフレーム１は、銅または銅を主成
分とする合金体からなる基体（２００〜５００μｆｆ１
）２に１〜４μｍのニッケル薄膜３がメッキなどに、］
：１）被覆され、このニッケル薄膜３表面に０．３〜３
．５μｍの銅薄膜４が形成され、この銅薄膜４表面に４
〜１４μｍの銀膜５が設けられ（３）
たものである。これらの膜すなわちニッケル薄膜３、銅
薄膜・１、銀膜５は、メッキ法などにより容易かつ節＋
ａ＋、：ｍを主成分とする基体１上に重畳して形成する
ことができる。The lead frame 1 according to the present invention has a base (200 to 500 μff1) made of copper or an alloy mainly composed of copper.
) 2 is plated with a 1-4 μm nickel thin film 3, etc.
:1) Coated with 0.3~3 on the surface of this nickel thin film 3
．． A 5 μm thick copper thin film 4 is formed on the surface of this copper thin film 4.
A silver film 5 of ~14 μm was provided (3). These films, namely the nickel thin film 3, the copper thin film 1, and the silver film 5, can be easily and cost-effectively formed using a plating method or the like.
It can be formed in a superimposed manner on the substrate 1 whose main components are a+,:m.
したがって本発明にかかるリードフレーム１は、熱伝導
度の良好な銅を主成分とした基体２であるために、放熱
性が良い。また、この基体２上にボンダビリティ並びに
熱伝導度の良好な銀膜５を設ける際、密着性のよいニッ
ケル薄膜３および銅薄膜４をそれらの間に介在させてい
る。そのために、このリードフレーム１のグイにＩＣチ
ップ（シリコンペレット）を金−シリコン共晶合金を用
いてグイボンディングする際、基体２の銅がこの共晶合
金内やシリコンペレット内に侵入しようとするとニッケ
ル薄膜３によってブロックできる。したがって本発明に
かかるリードフレームは、グイボンディングの際、基体
２の銅によりシリコンペレットすなわちＩＣチップにク
ラックが発生したり破損したりすることがない。なお、
本発明にかかるリードフレーム１においては、銀膜５下
に銅薄膜（４）
４があり、これより金−シリコン共晶合金やシリコンペ
レットに銅が侵入するが、上記銅薄膜４を０．３〜３．
５μ狛とすることにより、その侵入量がわずかとなり、
シリコンペレットにクラックや破損を生じさせるまでに
は到らない。Therefore, the lead frame 1 according to the present invention has good heat dissipation because the base body 2 is mainly made of copper which has good thermal conductivity. Further, when the silver film 5 having good bondability and thermal conductivity is provided on the substrate 2, a nickel thin film 3 and a copper thin film 4 having good adhesion are interposed therebetween. Therefore, when bonding an IC chip (silicon pellet) to the lead frame 1 using a gold-silicon eutectic alloy, if the copper of the base 2 tries to penetrate into the eutectic alloy or the silicon pellet, It can be blocked by the nickel thin film 3. Therefore, in the lead frame according to the present invention, the silicon pellet, that is, the IC chip, will not be cracked or damaged by the copper of the base 2 during bonding. In addition,
In the lead frame 1 according to the present invention, there is a copper thin film (4) 4 under the silver film 5, from which copper penetrates into the gold-silicon eutectic alloy and silicon pellets. ~3.
By setting it to 5μ, the amount of intrusion is small,
It does not reach the level of causing cracks or damage to the silicon pellets.
また、本発明にかかるリードフレーム１は、銀膜５下に
銅薄膜を有するものであるために、実装組立工程におい
てこのリードをはんだ付けする際、４００℃以」二の高
温処理にて行なっても良好なはんだ付は性（良好な密着
性）をもって完全にそれらを固着することがで外る。こ
のはんだ付は性を従来のリードフレーム（銅を基材とし
、これにニッケル薄膜を介してボンダビリティの良好な
銀メッキ膜を被覆したもの）と比較してみると下表のよ
（５）
なお、上表において、はんだ付は性の判定条件としては
、はんだとして鉛４０％とスズ６０％の組成のものでロ
ジンを７ラツクスとして使用し、ディップ時間は１回に
つト５秒間とし、このディップ作業を１回〜７回まで順
次繰り返し行なって、それぞれにおいてはんだ濡れ面積
が９５％以」二のものを良品とし、８５〜９５％のもの
を普通品とし、８５％未満のものを不良品とするもので
ある。そしてこの銅薄膜４は、従来の金薄膜にかわるも
のであるが、金材料に比して極めて安価なものであるた
めにリードフレーム１のコストをあげることはない。Furthermore, since the lead frame 1 according to the present invention has a thin copper film under the silver film 5, when soldering the leads in the mounting assembly process, the process is performed at a high temperature of 400°C or higher. Good soldering properties (good adhesion) also allow them to stick completely and come off. When comparing the soldering performance with a conventional lead frame (copper base material coated with a silver plating film with good bondability via a nickel thin film), the table below shows (5) In addition, in the above table, the conditions for determining the soldering properties are that the solder has a composition of 40% lead and 60% tin, rosin is used at 7 lux, the dipping time is 5 seconds each time, Repeat this dipping process from 1 to 7 times, and in each case, those with a solder wet area of 95% or more are considered good, those with 85 to 95% are considered normal, and those with less than 85% are considered defective. It is considered to be a good product. The copper thin film 4 replaces the conventional gold thin film, but it does not increase the cost of the lead frame 1 because it is much cheaper than gold materials.
本発明にかかるリードフレーム１は、」二連したリード
フレーム１におけるニッケル薄膜３のかわりに、スズ（
Ｓｎ）を含有したニッケル薄膜（硬質のリードフレーム
が得られ、また封止レジンとの接着性もよい。）を用い
ることができる。In the lead frame 1 according to the present invention, the nickel thin film 3 in the double lead frame 1 is replaced with tin (
A nickel thin film containing Sn (which provides a hard lead frame and has good adhesion to the sealing resin) can be used.
本発明にかかる電子部品の外部リードは、上述したパワ
ーＩＣのリードフレームに限定されず、種々の態様の半
導体装置、ハイブリッド素子など（６）
の電子部品に用いる外部リードに適用できるものである
。The external lead for an electronic component according to the present invention is not limited to the power IC lead frame described above, but can be applied to external leads used in various types of electronic components such as semiconductor devices and hybrid devices (6).
第１図は、本発明にかかるパワーＩＣのリードフレーム
を示す平面図、第２図は、第１図のＡ−Ａ’切断面の要
部の拡大断面図である。
１・・・リードフレーム、２・・・銅を主成分とする基
体、３・・・ニッケル薄膜、４・・・銅薄膜、５・・・
銀膜。
（７）
第 ２ 図FIG. 1 is a plan view showing a lead frame of a power IC according to the present invention, and FIG. 2 is an enlarged sectional view of a main part taken along the line AA' in FIG. DESCRIPTION OF SYMBOLS 1... Lead frame, 2... Substrate containing copper as a main component, 3... Nickel thin film, 4... Copper thin film, 5...
silver film. (7) Figure 2
Claims (1)
が被覆され、その薄膜上に銅膜が被１１され、そしてそ
の銅膜−１−に銀膜を介して半導体チップが取りつけら
れていることを特徴とする電子部品。A substrate whose main component is copper, the main surface of which is coated with a nickel-tin alloy thin film, a copper film 11 coated on the thin film, and a semiconductor chip attached to the copper film 1 through a silver film. Electronic components featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14052684A JPS60143637A (en) | 1984-07-09 | 1984-07-09 | Electronic component parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14052684A JPS60143637A (en) | 1984-07-09 | 1984-07-09 | Electronic component parts |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6655376A Division JPS6034265B2 (en) | 1976-06-09 | 1976-06-09 | electronic components |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60143637A true JPS60143637A (en) | 1985-07-29 |
Family
ID=15270714
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14052684A Pending JPS60143637A (en) | 1984-07-09 | 1984-07-09 | Electronic component parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60143637A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7462926B2 (en) * | 2005-12-01 | 2008-12-09 | Asm Assembly Automation Ltd. | Leadframe comprising tin plating or an intermetallic layer formed therefrom |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52149973A (en) * | 1976-06-09 | 1977-12-13 | Hitachi Ltd | External lead of electronic parts |
-
1984
- 1984-07-09 JP JP14052684A patent/JPS60143637A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52149973A (en) * | 1976-06-09 | 1977-12-13 | Hitachi Ltd | External lead of electronic parts |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7462926B2 (en) * | 2005-12-01 | 2008-12-09 | Asm Assembly Automation Ltd. | Leadframe comprising tin plating or an intermetallic layer formed therefrom |
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