JPS582949A - プログラムカウンタ - Google Patents

プログラムカウンタ

Info

Publication number
JPS582949A
JPS582949A JP10086781A JP10086781A JPS582949A JP S582949 A JPS582949 A JP S582949A JP 10086781 A JP10086781 A JP 10086781A JP 10086781 A JP10086781 A JP 10086781A JP S582949 A JPS582949 A JP S582949A
Authority
JP
Japan
Prior art keywords
rom
address
register
program
counter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10086781A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6136660B2 (enrdf_load_stackoverflow
Inventor
Mitsuo Shimada
島田　光夫
Toshitaka Tsuda
俊隆 津田
Yuichi Miwa
裕一 三輪
Hiroaki Imaide
広明 今出
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10086781A priority Critical patent/JPS582949A/ja
Publication of JPS582949A publication Critical patent/JPS582949A/ja
Publication of JPS6136660B2 publication Critical patent/JPS6136660B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
JP10086781A 1981-06-29 1981-06-29 プログラムカウンタ Granted JPS582949A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10086781A JPS582949A (ja) 1981-06-29 1981-06-29 プログラムカウンタ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10086781A JPS582949A (ja) 1981-06-29 1981-06-29 プログラムカウンタ

Publications (2)

Publication Number Publication Date
JPS582949A true JPS582949A (ja) 1983-01-08
JPS6136660B2 JPS6136660B2 (enrdf_load_stackoverflow) 1986-08-19

Family

ID=14285258

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10086781A Granted JPS582949A (ja) 1981-06-29 1981-06-29 プログラムカウンタ

Country Status (1)

Country Link
JP (1) JPS582949A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0461576U (enrdf_load_stackoverflow) * 1990-10-04 1992-05-27

Also Published As

Publication number Publication date
JPS6136660B2 (enrdf_load_stackoverflow) 1986-08-19

Similar Documents

Publication Publication Date Title
US5944813A (en) FPGA input output buffer with registered tristate enable
JPH04233825A (ja) プログラマブル論理装置、この装置で使用する回路ブロック、及び前記装置への入力が論理機能で使用されるかどうかを決定する方法
US6460131B1 (en) FPGA input output buffer with registered tristate enable
JPH01265347A (ja) アドレス生成装置
US5093805A (en) Non-binary memory array
JP3248927B2 (ja) 算術論理演算器及び演算機能実行方法
JPS61221938A (ja) シ−ケンス回路
JPS582949A (ja) プログラムカウンタ
EP0057096A2 (en) Information processing unit
JPH023163A (ja) 多ポートメモリ
JPH1117524A (ja) プログラマブル論理回路システムおよびプログラマブル論理回路装置の再構成方法
JPS61252714A (ja) プログラム可能な論理アレイ
KR100223626B1 (ko) 선입선출 메모리 회로
JP2003007065A (ja) データ記憶回路、データ処理装置
JPS6355623A (ja) 容量増加エラスチツクメモリ
JPS61199293A (ja) バンク切換え回路
JPH0721760B2 (ja) ディジタル演算回路
JPH01237735A (ja) トレースメモリ
JPH02161819A (ja) 半導体集積回路
JPS62233862A (ja) メモリ集積回路
JPH01134786A (ja) ランダム・アクセス・メモリ
JPH07121441A (ja) データ処理装置
Gossner et al. Repeated communication through the mechanism dqg
JPH02206222A (ja) カウンタ
JPS63276915A (ja) タイミング信号発生回路