JPS582949A - Program counter - Google Patents

Abstract

PURPOSE:To obtain a program counter made of a high density integrated circuit, by constituting the program counter with a register and a ROM. CONSTITUTION:The program counter of a stored program control processor is constituted with a register RG and a ROM; and in case that the output of the register RG is used as an address of the ROM, the address generated including a discriminating bit which indicating whether conditions are satisfied or not is inputted to the ROM, and the output of the ROM is inputted to the register RG. An 8-bit tristate driver TDV is used when the branch destination of a program is stored in a RAM, a stack, or the like. A data bus DTB is connected. If the branch address is written in data when the address of the jump destination is read in respect to the ROM, the operation control becomes easy. Thus, the counter where multibit integration is difficult conventionally is made of integrated circuit using multiple bits.

Description

DETAILED DESCRIPTION OF THE INVENTION (b) The present invention relates to a program counter that can be configured in a simple manner and is easy to control.

In a storage program controlled processor.

The 70-gram counter is generally constructed using a pulse counter using a flip-flop 1, as shown in FIG. In FIG. 1, the counter ONT determines a program corresponding to the counted value and causes the processor to execute it. After the program is operated, the count value is fed back to the selector 81iiL and inputted again to the counter ONT, where it is sequentially incremented by l. A flogram is determined each time. The selector 8EL is switched by inputting a predetermined "condition" and the counter is turned on so that the branch address L is displayed.
TK Make a new input. Therefore, the value of the counter ONT becomes a predetermined value, and it is possible to execute 10 grams in a special order rather than in a sequential program. At this time, due to the specified address, an 8-bit counter CNT''Ik:
When you want to use it, you can turn on the counter with number bit configuration.
? , selector 811, is an integrated circuit, so 2
It is necessary to use four individual accumulation paths. Therefore, if it is constructed from integrated circuits made up of individual parts, it will inevitably become large-scale.

The object of the present invention is to remedy the above-mentioned drawbacks, and to provide an easy-to-control,
There are 7 things to offer.

Embodiments of the present invention shown in the drawings will be described below. In the block configuration diagram shown in FIG. 2, ROM is a read-only memory gI (hereinafter abbreviated as ROM in this specification) and represents an integrated circuit 11iv of, for example, 8 bits x 512 words, and RG is a register of 8 bits. . TDV is an 8-bit tri-state driver and is used when the program branch destination is in RAM (random access memory), stack, etc. DTB indicates the data bus. The 0-order table adds the output of register RG of the contents stored in ROM or the address of ROM, and the data read from that address corresponds to the program number. 0 For example, if register RG is When outputting “0” and starting operation,
The ROM address is 0 and the data field is rlJ, so it is 1.
Execute the program numbered. The data is in register RG
This becomes the next read address of the ROM via the ROM. So 1
After the program operation of number 1 is completed, the number 1 is read out and the data is 1.
2", so the 0th order K R of the 2nd program V* line
The OMY reader and its data are the ``jump destination'' and a non-sequential program, such as program number 90, has been added, so it is executed.

ROM K and "jump destination" address '1:!
l? Then the data is [X'! Other addresses are written, such as ZJ. By writing the branch address in advance in this way, operation control becomes extremely simple.If the jump destination address differs depending on the conditions, register RG or ROM Y read address! Top level p) Conditioning MBB,
For example, address 12'7 where MBB is "0" has [x
When gsJ y2M8B becomes "l", a "conditional jump destination" is stored at address 255, which corresponds to the former. In that case, for example, the contents of the accumulator are "0".
Noto f7k To address 128, Aki, the contents of Mureta are “
1'', you can move forward to the conditional jump destination address.In the second part, the T part indicates ``condition'' and applies the idea of 0 conditional jump that performs bit control 1 on the address mentioned above, and moves the register RG. It is also possible to give a reset signal JijRB''Ik: to clear the contents.

Thus, according to the present invention, it is possible to solve a counter that has conventionally been difficult to integrate into multiple bits.

Collection 8 of multi-bit usage due to the configuration that uses ROM
This made it possible to make the storage program control type processor smaller, making it a small and effective processor. Alternatively, since the device has become smaller, a larger number of processors can be built in with the conventional volume, making the device more sophisticated. Since the counter has a ROM configuration, control for generating nine branch addresses is extremely simple. The 70th reason is that the hardware, including the control lines, has been simplified.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional tourogram counter, and FIG. 2 is a block diagram of an embodiment of the present invention. 8IL...Selector CNT...Counter DTEB...TATANO(STDV...Tri-state driver RG...Register ROM---Read-only memory Patent applicant Fujitsu Limited Agent) Patent attorney Eisuke Suzuki

Claims (1)

[Claims] In a 10-gram counter of a storage program control type processor, the program counter is composed of a register and a read-only storage device, and when the output of the register is used as the address of the read-only storage device, a determination bit is used to determine whether two conditions are satisfied. IF! is input into the read-only memory device as an address formed by including IF!, and the output of the read-only memory device is input into the register. Program counter with characteristics.