JPS5826536Y2 - 積層型半導体装置 - Google Patents

積層型半導体装置

Info

Publication number
JPS5826536Y2
JPS5826536Y2 JP1977064248U JP6424877U JPS5826536Y2 JP S5826536 Y2 JPS5826536 Y2 JP S5826536Y2 JP 1977064248 U JP1977064248 U JP 1977064248U JP 6424877 U JP6424877 U JP 6424877U JP S5826536 Y2 JPS5826536 Y2 JP S5826536Y2
Authority
JP
Japan
Prior art keywords
semiconductor device
external terminals
semiconductor
external
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1977064248U
Other languages
English (en)
Japanese (ja)
Other versions
JPS53159273U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
秀明 下田
栄造 藤井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1977064248U priority Critical patent/JPS5826536Y2/ja
Publication of JPS53159273U publication Critical patent/JPS53159273U/ja
Application granted granted Critical
Publication of JPS5826536Y2 publication Critical patent/JPS5826536Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP1977064248U 1977-05-18 1977-05-18 積層型半導体装置 Expired JPS5826536Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1977064248U JPS5826536Y2 (ja) 1977-05-18 1977-05-18 積層型半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1977064248U JPS5826536Y2 (ja) 1977-05-18 1977-05-18 積層型半導体装置

Publications (2)

Publication Number Publication Date
JPS53159273U JPS53159273U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1978-12-13
JPS5826536Y2 true JPS5826536Y2 (ja) 1983-06-08

Family

ID=28968194

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1977064248U Expired JPS5826536Y2 (ja) 1977-05-18 1977-05-18 積層型半導体装置

Country Status (1)

Country Link
JP (1) JPS5826536Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5036281Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1971-07-26 1975-10-22
JPS589585B2 (ja) * 1974-10-04 1983-02-22 日本電気株式会社 デンシブヒンヨウリ−ドフレ−ム

Also Published As

Publication number Publication date
JPS53159273U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1978-12-13

Similar Documents

Publication Publication Date Title
US6175149B1 (en) Mounting multiple semiconductor dies in a package
US6803251B2 (en) Integrated device package and fabrication methods thereof
US6225146B1 (en) Lead frame, method of manufacturing lead frame, semiconductor device and method of manufacturing semiconductor device
US6500698B2 (en) Method for fabricating a stacked semiconductor chip package
US20070144903A1 (en) Packaging structure of gas detector and method for making the same
JPS5826536Y2 (ja) 積層型半導体装置
JPS589585B2 (ja) デンシブヒンヨウリ−ドフレ−ム
JP2000315765A (ja) 半導体装置とそれに用いる配線基板
JP3495566B2 (ja) 半導体装置
JPH01154545A (ja) 樹脂封止型半導体装置
JPS60136248A (ja) リ−ドフレ−ムの製造方法
JPS6070752A (ja) 半導体装置の製造方法
JPS6020929Y2 (ja) 電気回路素子の封止枠構造
JPH02143449A (ja) 半導体封止容器
JPH0121568Y2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JPS5987841A (ja) 混成集積回路
KR200141125Y1 (ko) 리드프레임의 구조
KR900001988B1 (ko) 반도체장치에 사용되는 리이드 프레임
JPH01215049A (ja) 半導体装置
JPH0378245A (ja) Ｉｃパッケージ
JPH0637234A (ja) 半導体装置
KR970077418A (ko) 리드 프레임을 이용한 노운 굳 다이 제조 방법
JPH02303056A (ja) 半導体集積回路の製造方法
JPH02197151A (ja) 樹脂封止型半導体装置及びその製造方法
JPS58222552A (ja) 半導体装置