JPS5821359A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5821359A JPS5821359A JP11882781A JP11882781A JPS5821359A JP S5821359 A JPS5821359 A JP S5821359A JP 11882781 A JP11882781 A JP 11882781A JP 11882781 A JP11882781 A JP 11882781A JP S5821359 A JPS5821359 A JP S5821359A
- Authority
- JP
- Japan
- Prior art keywords
- header
- semiconductor element
- lead frame
- lead
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置、４Ｉにコレクタ絶縁型大電用トラ
ンジスタに好適な放熱板を有する装置の構造に関するも
のである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a structure of a semiconductor device having a heat sink suitable for a collector-insulated high-power transistor in 4I.
一般一大電力用トランジスタでは放熱効果を良くするた
め外部放熱板を取り付ける場合が多いが。In general, high-power transistors are often equipped with an external heat sink to improve heat dissipation.
通常の大電力用トランジスタは半導体素子を搭載するヘ
ッダー自体が接地電位が与えられる放熱板の一部として
用いられる。このためヘリグーの一部が装置外部表面に
露出している。通常の場合は外部放熱板をこのヘッダー
に直接堆シ付ければよいが、ヘッダーを出力用として使
用する場合はヘッダーと放熱板との間にマイカ等の絶縁
物をはさまなければならない。しかしながらこれらのＮ
Ｒね付は作業は費用がかさむため、外部放熱板を取り付
けるべき面と半導体素子とがあらかしめ絶縁されている
トランジスタが要求されている。以下このトランジスタ
をコレクタ絶縁渥トランジスタと呼ぶ。第１図に従来の
コレクタ絶縁型トランジスタの構造を示す。この構造で
は、モールド樹脂４の一部４′でヘッダーを包み込んで
外部へ露出させないようにしている。しかしながらこの
場合は。In a typical high-power transistor, the header on which the semiconductor element is mounted is itself used as part of a heat sink to which a ground potential is applied. Therefore, a portion of the heligoo is exposed on the external surface of the device. In normal cases, it is sufficient to attach an external heat sink directly to this header, but when the header is used for output, an insulating material such as mica must be sandwiched between the header and the heat sink. However, these N
Since R-bonding is an expensive process, there is a demand for transistors in which the surface to which an external heat sink is attached is somewhat insulated from the semiconductor element. Hereinafter, this transistor will be referred to as a collector-insulated transistor. FIG. 1 shows the structure of a conventional collector-insulated transistor. In this structure, the header is wrapped in a portion 4' of the molded resin 4 to prevent it from being exposed to the outside. However, in this case.
モールド封入精度及び封入後の外傷等を考直すると最低
１００μｍ以上の絶縁膜厚が必要となり絶縁膜４′での
熱抵抗が大きく放熱効果が損われてしまっていた。Considering mold encapsulation accuracy and damage after encapsulation, an insulating film thickness of at least 100 μm is required, and the thermal resistance of the insulating film 4' is large, impairing the heat dissipation effect.
本発明はこれらの欠点をなくシ、コレクタ絶縁型でかつ
放熱性の良好なト２／ジスタを提供するものである。The present invention eliminates these drawbacks and provides a collector-insulated transistor with good heat dissipation.
以下１図面を参照して本発明の一実施例を説明する。An embodiment of the present invention will be described below with reference to one drawing.
本実施例によれば、第２図のように半導体素子３を搭載
するヘッダー１と放熱性を良くするための放熱板６とが
エポキシ樹脂等の絶縁物５を介して絶縁接着されている
。この場合エポキシ樹脂等の絶縁物５の厚さは外傷等を
考慮しなくとも良いため５０μｍ程度で十分でＴｏシ、
従来よシはるかに熱抵抗が小さく出来る。According to this embodiment, as shown in FIG. 2, a header 1 on which a semiconductor element 3 is mounted and a heat dissipation plate 6 for improving heat dissipation are insulatively bonded via an insulator 5 such as epoxy resin. In this case, the thickness of the insulator 5 such as epoxy resin does not need to take into account external damage, so a thickness of about 50 μm is sufficient.
Thermal resistance can be made much smaller than before.
しかるに、本発明のトランジスタでは外部放熱板を取シ
付ける際にもマイカ等の絶縁物をはさむ必要がなく直接
放熱板６を外部放熱板に取り付ければよい。このため十
分な放熱効果が得られるとともに、ヘッダー１に絖〈コ
レクタリード部１′を出力用として使用すること参でき
る。However, in the transistor of the present invention, when attaching the external heat sink, there is no need to sandwich an insulating material such as mica, and the heat sink 6 can be directly attached to the external heat sink. Therefore, a sufficient heat dissipation effect can be obtained, and the collector lead portion 1' of the header 1 can be used for output.
本発明のトランジスタは次の様にして製造できる。The transistor of the present invention can be manufactured as follows.
従来知られている方法で製造された半導体素子３をヘッ
ダーが数個連なっであるリードフレームのマクント部に
半田付等の方法によシ固定し、さらに半導体素子のエミ
ヅタ電極又はペース電極を外部エミッタリード又はベー
スリードへ各々アルミニウム又は金ワイヤーを用いて接
続した後、銅又はアルミ等の板をリードフレームの各半
導体素子が固定された面と反対の面へエポキシ樹脂等に
よシ接着し、高温処理等にてエポキシ樹脂を硬化固定さ
せる。A semiconductor element 3 manufactured by a conventionally known method is fixed by a method such as soldering to a lead frame in which several headers are connected, and an emitter electrode or a pace electrode of the semiconductor element is connected to an external emitter. After connecting each lead or base lead using aluminum or gold wire, a plate of copper or aluminum is bonded to the surface of the lead frame opposite to the surface on which each semiconductor element is fixed using epoxy resin, etc., and heated at high temperature. The epoxy resin is cured and fixed through processing.
かかる後にエポキシ樹脂等にてモールド封止を行い、さ
らに外部リードが絶縁され各ヘッダーが分離される様リ
ードフレームの一部を切断する。かかる工程によシ容易
に作成できる。After this, mold sealing is performed with epoxy resin or the like, and a part of the lead frame is cut so that the external leads are insulated and each header is separated. It can be easily produced by such a process.
尚、絶縁物やヘヅダー、放熱板の材質は任意に選択して
も・よい。又、ＰＥＴやＩＣにも適用できる。Note that the materials of the insulator, header, and heat sink may be selected arbitrarily. It can also be applied to PET and IC.
第１図は従来のコレクタ絶縁型トランジスタ構造（Ｄｖ
ｌｆｒ面図、第２図は本発明の一実施例による装置構造
の断面図である。
１・・・・・・ヘッダー １／・・・・・・コレクタ外
部リード、２・・・・・・半田、３・・・・・・半導体
素子、４・・・・・・モールド樹脂、４′・・・・・・
絶縁膜、５・・・・・・絶縁膜、６・・・・・・・放熱
板。
第 ｆ 図
第 ２ 図Figure 1 shows the conventional collector isolated transistor structure (Dv
FIG. 2 is a sectional view of a device structure according to an embodiment of the present invention. 1...Header 1/...Collector external lead, 2...Solder, 3...Semiconductor element, 4...Mold resin, 4 '・・・・・・
Insulating film, 5... Insulating film, 6... Heat sink. Figure fFigure 2
Claims (1)
核ヘダダーと絶縁されて接着された放熱板とを有し、前
記半導体素子、前記へりダー及び前記放熱板は樹脂モー
ルドされてお染、＃記数熱板の一部はモールド樹脂から
露出していることを特徴とする半導体装置。a semiconductor element, a liper on which the scissors semiconductor element is placed;
It has a nuclear header and a heat sink insulated and bonded, the semiconductor element, the header and the heat sink are resin molded and dyed, and a part of the heat plate is exposed from the molded resin. A semiconductor device characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11882781A JPS5821359A (en) | 1981-07-29 | 1981-07-29 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11882781A JPS5821359A (en) | 1981-07-29 | 1981-07-29 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5821359A true JPS5821359A (en) | 1983-02-08 |
Family
ID=14746127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11882781A Pending JPS5821359A (en) | 1981-07-29 | 1981-07-29 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5821359A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0183024A2 (en) * | 1984-11-30 | 1986-06-04 | Degussa Aktiengesellschaft | Apparatus for the avoidance of local overheating of measuring transducers |
| JPS61198658A (en) * | 1985-02-27 | 1986-09-03 | Toshiba Corp | Resin-sealed semiconductor device |
-
1981
- 1981-07-29 JP JP11882781A patent/JPS5821359A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0183024A2 (en) * | 1984-11-30 | 1986-06-04 | Degussa Aktiengesellschaft | Apparatus for the avoidance of local overheating of measuring transducers |
| JPS61198658A (en) * | 1985-02-27 | 1986-09-03 | Toshiba Corp | Resin-sealed semiconductor device |
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