JPS6329413B2 - - Google Patents

Info

Publication number
JPS6329413B2
JPS6329413B2 JP54013357A JP1335779A JPS6329413B2 JP S6329413 B2 JPS6329413 B2 JP S6329413B2 JP 54013357 A JP54013357 A JP 54013357A JP 1335779 A JP1335779 A JP 1335779A JP S6329413 B2 JPS6329413 B2 JP S6329413B2
Authority
JP
Japan
Prior art keywords
tab
lead
leads
circuit element
heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54013357A
Other languages
Japanese (ja)
Other versions
JPS55107250A (en
Inventor
Fumihito Inoe
Kazuo Shimizu
Susumu Okikawa
Keizo Ootsuki
Takehiko Yanagida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1335779A priority Critical patent/JPS55107250A/en
Publication of JPS55107250A publication Critical patent/JPS55107250A/en
Publication of JPS6329413B2 publication Critical patent/JPS6329413B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体技術分野における特に民生用
IC、リニアIC等のプラスチツクパツケージの電
子部品に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention is applicable to the field of semiconductor technology, especially for consumer use.
Concerning electronic components of plastic packages such as ICs and linear ICs.

[従来技術] 民生用IC、リニアIC等の小信号用IC等のパツ
ケージとしてプラスチツクパツケージ特にエポキ
シ樹脂材料を封止材料としたレジンモールドパツ
ケージが製造コストが安価であることなどから一
般に多く採用されている。
[Prior art] Plastic packages, especially resin mold packages using epoxy resin as a sealing material, are generally widely used as packages for small signal ICs such as consumer ICs and linear ICs due to their low manufacturing costs. There is.

このようなレジンモールドパツケージで放熱効
果を向上させる構造としては、特開昭51−45977
号公報に開示のような構造が知られている。
A structure for improving the heat dissipation effect of such a resin mold package is disclosed in Japanese Patent Application Laid-Open No. 51-45977.
A structure as disclosed in Japanese Patent Publication No.

ところで、電子部品を組み込む装置の小型化の
要請から電子部品特にそのパツケージの小型化が
進められている。
Incidentally, due to the demand for downsizing of devices into which electronic components are installed, electronic components, especially their packages, are being downsized.

[発明が解決しようとする問題点] 従来において、リニアICでも高密度実装が進
められパツケージ外形の小型化が要請されはじめ
たが、リニアIC等の小信号ICでも高集積化が進
み、回路素子の発熱量が多いものが多くなつてき
ており、小信号ICでも放熱効果について充分配
慮しなければならなくなつてきているが、上述し
た公報に開示の構成では小型化が極めて困難であ
る。
[Problems to be solved by the invention] In the past, high-density packaging of linear ICs has progressed and there has been a demand for smaller package outlines, but small-signal ICs such as linear ICs have also become highly integrated, and circuit elements have become smaller. As more and more ICs generate a large amount of heat, even small-signal ICs must give sufficient consideration to the heat dissipation effect, but miniaturization is extremely difficult with the configuration disclosed in the above-mentioned publication.

したがつて、本発明の目的は発熱量の多い小信
号IC等の半導体装置にあつて、低コストでかつ
小型のものでしかも熱的特性の良好なものを提供
せんとすることにある。
Therefore, an object of the present invention is to provide a semiconductor device such as a small signal IC that generates a large amount of heat, which is small in size and low in cost, and has good thermal characteristics.

[問題点を解決するための手段] このような目的を達成するために本発明は、互
いに対向する辺をもつタブと、 一端側がそのタブの辺に近接し、配線基板に接
続されるべき他端側が所定方向に延在してなる複
数のリードと、 前記タブ上に固定された複数の電極を有する回
路素子と、 その回路素子の電極と前記リード一端側とを接
続するワイヤと、 前記リードの他端側を露出するように前記回路
素子、タブ、ワイヤおよびリード一端側を封止し
てなるレジン封止体とからなる半導体装置であつ
て、 前記タブにはその一つの辺およびそれに対向す
る辺のそれぞれにおいて複数本のタブ連接リード
が接続され、それらタブ連接リードの一部は前記
レジン封止体外へ延在導出され、前記リードとと
もに配線基板に接続されるべき部分をもつことを
特徴とする半導体装置にある。
[Means for Solving the Problems] In order to achieve such an object, the present invention provides a tab having sides facing each other, and another tab having one end close to the side of the tab and connected to a wiring board. a circuit element having a plurality of electrodes fixed on the tab; a wire connecting the electrode of the circuit element to one end of the lead; and the lead. A semiconductor device comprising a resin sealing body formed by sealing one end of the circuit element, a tab, a wire, and a lead so as to expose the other end, the tab having one side thereof and a resin sealing body opposite thereto. A plurality of tab connecting leads are connected to each of the sides, and a portion of the tab connecting leads extends outside the resin sealing body and has a portion to be connected to the wiring board together with the leads. It is in a semiconductor device that uses

すなわち、本発明は、(1)タブの一つの辺および
それに対向する辺のそれぞれにおいて複数本のタ
ブ連接リードが接続されている点、(2)それらタブ
連接リードの一部はワイヤ接続リードとともにレ
ジン封止体外に導出し、配線基板に接続されるべ
き部分をもつている点、に技術的工夫がこらされ
ている。
That is, the present invention has the following features: (1) A plurality of tab connecting leads are connected to each of one side of the tab and the opposite side, and (2) some of the tab connecting leads are connected to the wire connecting leads. A technical ingenuity has been taken in that it has a part that should be led out of the resin sealing body and connected to the wiring board.

このような本願発明によれば、上記(1)、(2)の技
術的工夫により、熱を迅速かつ均等に半導体装置
を実装すべく配線基板に分散させことができ、放
熱板の如き部品が不要となり、低コストかつ小型
で熱放散効率の良好なものが得られる。
According to the present invention, heat can be quickly and evenly distributed to the wiring board for mounting semiconductor devices by the technical devices described in (1) and (2) above, and parts such as heat sinks can be dissipated. This makes it possible to obtain a low-cost, small-sized device with good heat dissipation efficiency.

[実施例] 第3図に本発明の一実施例によるレジンモール
ド型リードフレームを示す。レジンモールド型半
導体装置の組立には熱伝導率αの良好な純銅(α
=0.92cal/cm/cm2/sec)などの銅系金属薄板を
精密プレスやエツチングによつてパターン化した
リードフレームを用いる。また、機械的強度の向
上および熱伝導度を向上させるために、比較的厚
い銅板、たとえば0.25mmの厚さの銅板から作り出
したリードフレームを用いる。
[Embodiment] FIG. 3 shows a resin mold type lead frame according to an embodiment of the present invention. Pure copper with good thermal conductivity α (α
A lead frame is used that is made of a thin copper-based metal plate (=0.92 cal/cm/cm 2 /sec) patterned by precision pressing or etching. Also, in order to improve mechanical strength and thermal conductivity, a lead frame made from a relatively thick copper plate, for example a 0.25 mm thick copper plate, is used.

このリードフレームは第1図に示すように、タ
ブリード12の本数を多くすることによつて伝熱
(放熱)効果を増大させている。すなわち、それ
らタブリード12はリード13に囲まれ、そして
それらリード13と同一方向に延び、しかもその
リード13とほぼ同一幅となつている。このため
リード折り曲げ時に均等に加重が加わり折り曲げ
やすく、リード先端も均一にそろう効果がある。
As shown in FIG. 1, this lead frame increases the heat transfer (heat radiation) effect by increasing the number of tab leads 12. That is, the tab leads 12 are surrounded by the leads 13, extend in the same direction as the leads 13, and have substantially the same width as the leads 13. For this reason, when bending the leads, the load is applied evenly to facilitate bending, and the tips of the leads are also aligned uniformly.

つぎに、第1図に示すリードフレームを用いた
半導体(IC)の組立を説明する。
Next, assembly of a semiconductor (IC) using the lead frame shown in FIG. 1 will be explained.

第2図に示す如く、タブ11上に回路素子10
を固定した後、この回路素子10の各電極とこれ
に対応するリード13の先端とを細いワイヤ15
で接続し、その後、二点鎖線枠内をレジンモール
ドしてモールド部(封止体)16でタブリードお
よびリード外端部以外を被うとともにタブリード
12を切断して外枠から分離する。
As shown in FIG. 2, a circuit element 10 is placed on the tab 11.
After fixing, each electrode of this circuit element 10 and the tip of the corresponding lead 13 are connected with a thin wire 15.
After that, resin molding is performed within the two-dot chain line frame, and the mold part (sealing body) 16 covers the tab lead and other parts except the outer end of the lead, and the tab lead 12 is cut and separated from the outer frame.

このようにして得られた電子部品によればパツ
ケージが小型にできる。また、複数のタブリード
12の外端が封止体16から突出しているため、
加熱フインのような役割を果し、放熱効果が増大
できる。また、タブリード12は熱伝導率の良好
な銅で作られているため放熱性が良い。
The electronic component thus obtained allows the package to be made smaller. Further, since the outer ends of the plurality of tab leads 12 protrude from the sealing body 16,
It acts like a heating fin and can increase the heat dissipation effect. Further, since the tab lead 12 is made of copper having good thermal conductivity, it has good heat dissipation.

本発明の電子部品は第3図で示す実装構造(電
子部品モジユール)が望ましい。
The electronic component of the present invention preferably has a mounting structure (electronic component module) shown in FIG.

すなわち、同図はIC18をセラミツク基板2
0に取り付ける際の状態を示すものであつて、リ
ード13の外端はセラミツク基板(配線基板)2
0の図示しない配線層に半田(図示せず)を介し
て固定される。また、セラミツク基板20は熱伝
導率が高いことからタブリード12の外端は他の
リードとともに下方に折り曲げられてセラミツク
基板20に半田(図示せず)を介して固定され
る。
That is, in the figure, the IC 18 is connected to the ceramic substrate 2.
0, the outer end of the lead 13 is attached to the ceramic board (wiring board) 2.
It is fixed to the wiring layer 0 (not shown) via solder (not shown). Furthermore, since the ceramic substrate 20 has high thermal conductivity, the outer end of the tab lead 12 is bent downward together with other leads and fixed to the ceramic substrate 20 via solder (not shown).

また、第4図に示すように、リード13および
タブリード12の先端を折り曲げないで直接セラ
ミツク基板17に接触させるようにして半田23
で固定する構造を採用すれば、取付面積が狭くな
る。また、モールド部16の外縁からリード13
およびタブリード12の屈曲部までの距離lをで
きるだけ短かくし、リード13およびタブリード
12の高さHも低くすることによつて伝熱経路も
短くなるのでさらに放熱特性が向上する。
Further, as shown in FIG. 4, the tips of the leads 13 and tab leads 12 are brought into direct contact with the ceramic substrate 17 without being bent, so that the solder 23 is not bent.
If a structure is adopted in which it is fixed in place, the installation area will be narrower. In addition, the lead 13 is
By making the distance l to the bent portion of the tab lead 12 as short as possible and also reducing the height H of the lead 13 and the tab lead 12, the heat transfer path is also shortened, so that the heat dissipation characteristics are further improved.

[効果] このように、発熱源となる回路素子を支持する
タブリード12の外端は熱伝導率が高い放熱板の
役割を果すセラミツク基板20に連結されるた
め、熱はタブリード12を介して放熱板から順次
放熱される。また、タブリードの長さ(経路)は
短かいため、熱伝達路も短かくなり放熱効果も高
い(このことは一般のデユアルインライン形のリ
ードフレームを用いたものと比較すると顕著であ
る)。
[Effect] In this way, the outer end of the tab lead 12 that supports the circuit element that becomes the heat source is connected to the ceramic substrate 20 that serves as a heat sink with high thermal conductivity, so that heat is radiated through the tab lead 12. Heat is radiated sequentially from the plates. In addition, since the length (path) of the tab lead is short, the heat transfer path is also short and the heat dissipation effect is high (this is remarkable when compared to those using a general dual-in-line lead frame).

この実装構造、すなわち、タブリード2がセラ
ミツク板に固定される本実施例はタブリードがセ
ラミツク板に接触しない場合に較べて遥かに熱抵
抗が低くなる(第5図参照)。すなわち、パツケ
ージ単体ではモールド部が小型になつたこともあ
つて熱抵抗はたとえば216℃/Wと大きいが、セ
ラミツク基板のように熱伝導率の良い実装基板に
取り付けた状態では小型パツケージの方が大型パ
ツケージよりも熱抵抗が小さくなる。
This mounting structure, ie, this embodiment in which the tab lead 2 is fixed to the ceramic plate, has a much lower thermal resistance than the case where the tab lead does not contact the ceramic plate (see FIG. 5). In other words, the thermal resistance of a single package is as high as 216°C/W, due in part to the miniaturization of the mold part, but when attached to a mounting board with good thermal conductivity such as a ceramic board, a small package has a higher thermal resistance. Thermal resistance is lower than that of a large package.

したがつて、本実施例のようにすればパツケー
ジ(モールド部)が10mm□以下に小型化されても
放熱特性は良好となることから、比較的熱を発生
する民生用ICやリニアICの小型化は可能となる。
また、リードフレームは安価な銅系材料を使用す
ることからICも安価となる。
Therefore, if this example is used, the heat dissipation characteristics will be good even if the package (mold part) is miniaturized to 10 mm or less, so it can be used for compact consumer ICs and linear ICs that generate relatively heat. becomes possible.
Furthermore, since the lead frame uses an inexpensive copper-based material, the IC is also inexpensive.

特に本発明によれば、熱放散のための複数タブ
リードが他のリードとほぼ同一幅をなしているた
め、リード折り曲げが均一にでき、リード先端を
そろえることができる。このため、実装時におい
て配線板との半田付け不良がなくなる効果を奏す
る。
In particular, according to the present invention, since the plurality of tab leads for heat dissipation have approximately the same width as the other leads, the leads can be bent uniformly and the lead tips can be aligned. This has the effect of eliminating soldering defects with the wiring board during mounting.

以上のように、本発明によれば熱伝導率の良好
な金属を用い、かつ熱発生源となる回路素子を取
り付けるタブから延びるタブリードは封止体外に
複数本引き出され、放熱体として用いられる。ま
た、このタブリードは熱伝導率の良好なアルミナ
セラミツク基板等の放熱体(配線板)に接続され
ることから、発熱量の多いレジンモールド型の
ICであつても小型化を図ることができる。また、
リードフレームは安価な銅を使用することができ
るので製造コストの低減化も図れる。
As described above, according to the present invention, a plurality of tab leads that are made of a metal with good thermal conductivity and extend from a tab to which a circuit element serving as a heat generation source is attached are drawn out of the sealed body and used as a heat radiator. In addition, since this tab lead is connected to a heat sink (wiring board) such as an alumina ceramic substrate with good thermal conductivity, resin mold type which generates a large amount of heat is
Even if it is an IC, it can be made smaller. Also,
Since the lead frame can be made of inexpensive copper, manufacturing costs can also be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例によるリードフレー
ムまを示す平面図、第2図は第1図のリードフレ
ームを用いたICの組み立てを示す平面図、第3
図は本発明の実装構造、すなわち電子部品モジユ
ールの正面図、第4図は電子部品の他の実施構造
を示す一部断面正面図、第5図は本発明により電
子部品の熱抵抗特性を示すグラフである。 10……回路素子、11……タブ、12……タ
ブリード、13……リード、15……ワイヤ、1
6……モールド部、17……配線板、18……
IC、20……セラミツク基板、23……半田。
FIG. 1 is a plan view showing a lead frame according to an embodiment of the present invention, FIG. 2 is a plan view showing assembly of an IC using the lead frame of FIG. 1, and FIG.
Figure 4 is a front view of the mounting structure of the present invention, that is, an electronic component module; Figure 4 is a partially sectional front view showing another implementation structure of the electronic component; Figure 5 is a diagram showing the thermal resistance characteristics of the electronic component according to the present invention. It is a graph. 10...Circuit element, 11...Tab, 12...Tab lead, 13...Lead, 15...Wire, 1
6...Mold part, 17...Wiring board, 18...
IC, 20...ceramic substrate, 23...solder.

Claims (1)

【特許請求の範囲】 1 互いに対向する辺をもつタブと、 一端側がそのタブの辺に近接し、配線基板に接
続されるべき他端側が所定方向に延在してなる複
数のリードと、 前記タブ上に固定された複数の電極を有する回
路素子と、 その回路素子の電極と前記リード一端側とを接
続するワイヤと、 前記リードの他端側を露出するように前記回路
素子、タブ、ワイヤおよびリード一端側を封止し
てなるレジン封止体とからなる半導体装置であつ
て、 前記タブにはその一つの辺およびそれに対向す
る辺のそれぞれにおいて複数本のタブ連接リード
が接続され、それらタブ連接リードの一部は前記
レジン封止体外へ延在導出され、前記リードとと
もに配線基板に接続されるべき部分をもつことを
特徴とする半導体装置。
[Scope of Claims] 1. A tab having sides facing each other; and a plurality of leads each having one end close to the side of the tab and the other end to be connected to a wiring board extending in a predetermined direction; a circuit element having a plurality of electrodes fixed on a tab; a wire connecting the electrode of the circuit element to one end of the lead; and the circuit element, the tab, and the wire so as to expose the other end of the lead. and a resin-sealed body formed by sealing one end side of the lead, the tab having a plurality of tab connecting leads connected to each of one side and the opposite side thereof, A semiconductor device characterized in that a portion of the tab connecting lead extends outside the resin sealing body and has a portion to be connected to the wiring board together with the lead.
JP1335779A 1979-02-09 1979-02-09 Electronic part, electronic part module and lead frame used for them Granted JPS55107250A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1335779A JPS55107250A (en) 1979-02-09 1979-02-09 Electronic part, electronic part module and lead frame used for them

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1335779A JPS55107250A (en) 1979-02-09 1979-02-09 Electronic part, electronic part module and lead frame used for them

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP63010668A Division JPS63296258A (en) 1988-01-22 1988-01-22 Mounting structure of electronic component

Publications (2)

Publication Number Publication Date
JPS55107250A JPS55107250A (en) 1980-08-16
JPS6329413B2 true JPS6329413B2 (en) 1988-06-14

Family

ID=11830841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1335779A Granted JPS55107250A (en) 1979-02-09 1979-02-09 Electronic part, electronic part module and lead frame used for them

Country Status (1)

Country Link
JP (1) JPS55107250A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61150356A (en) * 1984-12-25 1986-07-09 Toshiba Corp Plane mounting form of resin sealed type semiconductor device
JP2532843B2 (en) * 1986-06-25 1996-09-11 株式会社日立製作所 Electronic equipment
JPS63296258A (en) * 1988-01-22 1988-12-02 Hitachi Ltd Mounting structure of electronic component
US6979900B2 (en) * 2003-10-21 2005-12-27 Delphi Technologies, Inc. Integrated circuit package with integral leadframe convector and method therefor
JP4771294B2 (en) * 2007-05-31 2011-09-14 日立工機株式会社 centrifuge

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4421066Y1 (en) * 1966-07-20 1969-09-08
JPS4964373A (en) * 1972-06-23 1974-06-21
JPS511072A (en) * 1974-06-21 1976-01-07 Fujitsu Ltd JUSHIFUJIGATAHANDOTAISOCHINO SEIZOHOHO
JPS5145977A (en) * 1974-10-17 1976-04-19 Nippon Electric Co JUSHIFUSHIGATAHANDOTAISOCHI
JPS53108368A (en) * 1977-03-04 1978-09-21 Hitachi Ltd Manufacture for resin seal type semiconductor device and its lead frame for its manufacture

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4421066Y1 (en) * 1966-07-20 1969-09-08
JPS4964373A (en) * 1972-06-23 1974-06-21
JPS511072A (en) * 1974-06-21 1976-01-07 Fujitsu Ltd JUSHIFUJIGATAHANDOTAISOCHINO SEIZOHOHO
JPS5145977A (en) * 1974-10-17 1976-04-19 Nippon Electric Co JUSHIFUSHIGATAHANDOTAISOCHI
JPS53108368A (en) * 1977-03-04 1978-09-21 Hitachi Ltd Manufacture for resin seal type semiconductor device and its lead frame for its manufacture

Also Published As

Publication number Publication date
JPS55107250A (en) 1980-08-16

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