JPS5821180Y2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPS5821180Y2
JPS5821180Y2 JP1976082382U JP8238276U JPS5821180Y2 JP S5821180 Y2 JPS5821180 Y2 JP S5821180Y2 JP 1976082382 U JP1976082382 U JP 1976082382U JP 8238276 U JP8238276 U JP 8238276U JP S5821180 Y2 JPS5821180 Y2 JP S5821180Y2
Authority
JP
Japan
Prior art keywords
frame
semiconductor device
assembly
leads
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1976082382U
Other languages
English (en)
Japanese (ja)
Other versions
JPS53762U (US20020095090A1-20020718-M00002.png
Inventor
興光 安田
Original Assignee
株式会社東芝
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社東芝 filed Critical 株式会社東芝
Priority to JP1976082382U priority Critical patent/JPS5821180Y2/ja
Publication of JPS53762U publication Critical patent/JPS53762U/ja
Application granted granted Critical
Publication of JPS5821180Y2 publication Critical patent/JPS5821180Y2/ja
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1976082382U 1976-06-23 1976-06-23 半導体装置 Expired JPS5821180Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1976082382U JPS5821180Y2 (ja) 1976-06-23 1976-06-23 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1976082382U JPS5821180Y2 (ja) 1976-06-23 1976-06-23 半導体装置

Publications (2)

Publication Number Publication Date
JPS53762U JPS53762U (US20020095090A1-20020718-M00002.png) 1978-01-06
JPS5821180Y2 true JPS5821180Y2 (ja) 1983-05-04

Family

ID=28562853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1976082382U Expired JPS5821180Y2 (ja) 1976-06-23 1976-06-23 半導体装置

Country Status (1)

Country Link
JP (1) JPS5821180Y2 (US20020095090A1-20020718-M00002.png)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929974A (US20020095090A1-20020718-M00002.png) * 1972-07-19 1974-03-16
JPS5029163A (US20020095090A1-20020718-M00002.png) * 1973-07-17 1975-03-25
JPS5148168A (ja) * 1974-10-22 1976-04-24 Matsushita Electric Ind Co Ltd Konseishusekikairosochi

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4929974A (US20020095090A1-20020718-M00002.png) * 1972-07-19 1974-03-16
JPS5029163A (US20020095090A1-20020718-M00002.png) * 1973-07-17 1975-03-25
JPS5148168A (ja) * 1974-10-22 1976-04-24 Matsushita Electric Ind Co Ltd Konseishusekikairosochi

Also Published As

Publication number Publication date
JPS53762U (US20020095090A1-20020718-M00002.png) 1978-01-06

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