JPS58203559A - Method for inputting/outputting signal in digital signal processing system - Google Patents

Abstract

PURPOSE:To simplify the inputting/outputting of data between signal processing system by making the contents of the memory cell indicated by an input signal an output data signal, when said input signal having prescribed format is inputted as an input address signal. CONSTITUTION:The specific bit of a signal inputted from the external of a digital signal processor DSP to an input address register IAR is previously assigned as an operation discriminating bit and a prescribed value is set up in the bit. When an internal processing circuit MPU recognizes the setting status of a discrimination bit, an alteration switch SW (c) is connected as shown in the drawing, data stored in a main memory MM are read out by the address stored in the IAR and the read-out data are stored in an output data register ODR. The read-out data are transferred to the specified address of the ODR as an input signal through an input data register IDR and a SW (d). At that time, the MPU turns the SW (d) to the opposite side. Consequently, data stored in the internal of the DSP can be outputted as output data in the same procedure as that storing data in the internal of the DSP.

Description

[Detailed Description of the Invention] ili The technical field of the invention is BA, which uses a general-purpose digital 1st gear extrapolation q (nsp) thread such as the one that uses a holder in a micro-pro, and transfers data between signal processing systems for each process. This paper relates to a signal input/output method for digital signal processing systems that is made possible by instructions between systems.

■ Conventional technology and problems Digital signal processing using a microprocessor (p
sp) system, if data transfer between signal processing systems was required, that processing was likely to be a backup. For example 4
In the block diagram shown in FIG. 1, the broken line indicates the right side or the inside of D9F, and the left side of the broken line indicates the outside of DSF. DB
Consider the case where data stored in the memory element (memory i) inside the F is retrieved to the outside of the DEP. data? Memory storage) To store data in the memory cell a-, from outside the DSI', input the address of the memory hill of the storage device MM into the address register AR, and once from the input data register H into the storage device.

The changeover of the changeover switch ω operates so that predetermined data is read through two registers.

Off, 洟Swipe tθft Internal processing as shown position
By setting PH = 1, write f in a predetermined cell of the device νV.
Make L seasonal crops. Next, when transmitting the stored data to another location using an access from outside the DSP, when the output request signal is input manually, the internal processing circuit wrMPMlr
decodes it and usually uses programmatic # (more storage layer [
A predetermined address 7 of the IMM is generated, the changeover switch 6 is set to the opposite side of the 6x signal, and the memory device MMx is read out, and data V is stored in the output data register ODR. data? Store the device address outside the DSF to be sent in the output address register 0mH. The address was previously input into the DIP in the form of human data from outside the DIF or by issuing a command, and was recorded in the MM. The address and data stored in each register are processed and processed by the DSP.
In the above-mentioned conventional signal input method, when the signal is sent to the external device and is stored in the negative MM and is output as output data, it is read out to specify the address of the seventh memory cell. Generating addresses for use is complicated, and it is natural that a remote access command must be used to perform the processing.

+31 Purpose of the Invention The purpose of the present invention is to remedy the above-mentioned deficiencies,
In the DBP system, data transfer between systems is made possible by instructions between systems, even if data is input using the same f-mat as normal prefectural human power signals.

141 Structure of the Invention The structure of the present invention includes a means for inputting an input data signal and an address 100 for storing a memory cell storing the input data; Signal ff: In the digital/digital code processing system No. 1a output system, which has a means for outputting an address signal specifying a memory cell to be stored outside of the stone system, one word of the address to be input is input. Iy) When a signal in a specified format is manually input, the output data signal is set as the output data signal of the memory cell at the address indicated by the AT L/S signal 4, and the input data signal or The τgi issue that prayed for Ichigo again? It is to be processed as output r address No. 1.

(51 'if! Example of the invention The embodiment of the present invention shown in Figure 1 will be explained below. Figure 2 G1 is a diagram a showing the composition of an embodiment of the present invention, and the row symbols are the same as those in Figure @1. The input signal input to the input address register AR uses the same format and the same format as the input signal input to the input address register AR.For example, the specific bit 7 of the input address register AR. Preliminary allocation ``''C'''C as the i-made hawk 1 bit of the present invention
Then, if the operation or data deployment is not 4 but data output, the % bit Y of the power signal is set to a predetermined value and input to the power address register AR. Set the I pit. After confirming the setting status of the internal processing PCI or in-meeting person, turn the changeover switch 0 (C
The temperature is still at 7, and the input address register AuK:
Each submitted address is recorded by fflirtM! Read data of A. The read data becomes output data and is stored in the output data register 0DFtK@n. - The read data should be transmitted through the universal signal.The address of the AVA location is transferred to the input data register T'JR -> changeover switch -> machete data register 0DFI. Tips ρ
The heat treatment circuit MFTT switches the changeover switch [phase] ten thousand times as shown in the figure. By using the data that is stored as output data, it can be sent between processing systems at any time.

In Fig. 2, it is also possible to share the 1st input/output address/register with another IC 1, ρz, and the 11g nozzle χ time scale, and if the processing system is connected to the input circuit No. 8 in parallel. The register may not be necessary. The 1-bit address signal can be used as an output address signal using all the predetermined bits from the large data signal, or as a predetermined bit v
The updated signal may be used as the blade address signal.

+61 Effect of the Invention In this way, according to the invention, the circuit has an easy configuration, and when writing to the storage device, output address signals from Sρ1 are given to the outside in the same procedure as that of Yomo, and data is read out from the storage device. The only thing to do is to transfer it, or to output it in a unified manner with the signal spontaneously output from the internal ρ1. Furthermore, when processing systems with the same configuration are placed opposite each other, the effect is that the data will not be easily affected by the same operation.

[Brief explanation of the drawing]

Figure 1 shows the conventional configuration, and Figure 2 shows the configuration of the main line □ clear example.
It is a figure r. From the manual address register R.--.
・-Manual data register MM・-・-Record 11t device MCσ・−・・−・Internal processing OAR・−・−・Deba address register OD R−−−
--Ikkato Data Register Applicant Fujitsu Co., Ltd. Agent Patent Attorney Eisuke Suzuki Figure 1 Figure 2

Claims (1)

[Claims] Means for inputting an input data signal and an address signal instructing a memory cell for storing the input data signal, and an address for instructing a memory cell to store the data signal to be output and the data signal outside the processing system. In a signal input/output system of a digital signal processing system having a means for outputting a signal, when a signal in a predetermined format is input as an input address signal, the address signal is A digital signal whose characteristic is to process the contents of the memory cell at the address indicated by (/C1) as an output address signal, and to process a manual data signal or a signal obtained by changing 14 parts of the input data signal as an output address signal. Processing system signal input/output is guaranteed.