JPS58198787A - Method for controlling load at set time - Google Patents

Abstract

PURPOSE:To omit the rewriting work of an RAM, by comparing a set time written in the RAM with a time counting signal in an ordinary case and comparing a time set to a digital switch with the time counting signal in an extraordinary case. CONSTITUTION:Set times for the ordinary case when plural loads such as a chime, an electric bell, and an illuminating power source are divided for every load and are written in an RAM 1 for time set. L-number of set times for the extraordinary case are set to digital switches 221-22l. When the set value of a digital switch 11 for an special circuit is 0, a CPU7 compares times set in the RAM1 with the time counting signal of a time counting LSI9 to control external relays 13, 17, and 19. When the set value of the digital switch 11 is not 0, the CPU7 compares times set to digital switches 221-22l with the time counting signal to control relays 13, 17, and 19.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control method for operating a chime or the like at a preset time.

Conventionally, the above method involves comparing the set time written in the RAMK with a clock signal and driving a chime or the like when the two match. However, with this method, for example, if you want to temporarily change the set time for that day at a school etc. for an exam, etc., 1. The set time in RAM must be rewritten\This will naturally erase the original set time, so the next day the original set time will be rewritten to R'
I have to write to AM. That is, the rewriting operation had to be performed twice in total, which was troublesome and inconvenient.

The purpose of the present invention is to provide a control method that eliminates such inconvenience, and therefore, in a normal case, the normal set time written in the time setting RAMv: is compared with the clock signal, and the two are checked. When they match, the load such as a chime is controlled, and in the case of an emergency, the temporary setting time set by the time setting RAM and a separate digital switch is compared with the clock signal. When the two match, the load is controlled. It is something to do. In the method according to the invention, the time setting R
Since it is not necessary to rewrite the AM setting time, work efficiency is improved.

11 Below, this invention will be explained in detail based on one embodiment shown in the drawings. In this embodiment, a plurality of loads such as a chime, a bell, and a lighting power source are controlled at each set time. The normal setting time for each load is in hours and minutes, and there are 1 times, and these are divided into 1 time setting RA for each load as shown in Figure 1.
It is written in MI. Hereinafter, this set time for normal use of one of the loads will be referred to as a circuit. Therefore, this embodiment has three circuits, one circuit for the chime, one circuit for the electric bell, and one circuit for the lighting power source. RAM for setting these normal setting times
Writing to the input/output interface 5-.1 is performed by operating the time setting digital switch 3. C
This is done via pu7.

The clock signal that matches these set times is
Generated by JSI 9. This timing LSI
9 is a crystal oscillator that generates a high frequency voltage of, for example, 4.194304 MHz; λ is a divider that divides this high frequency voltage into 22 steps to generate a reference frequency pulse S of IHz; Output to ゛A second counter that generates a pulse M, a minute counter that counts the pulse M and generates its counting output, and that generates an output pulse H every 6o counts and is reset, and a minute counter that counts 1 parnu H. It generates the count output and also has a built-in clock counter that is reset every 24 counts, and supplies the count outputs of the one-minute counter and the clock counter to the CPU 7 as a time signal.

The judgment as to whether or not each normal set time and the clock signal match is made when the temporary circuit setting digital switch 11 is set to "0" by 0pu7, and this is shown in Fig. 2. The explanation will be given according to the flowchart shown. First, \0pu7 determines whether the setting of the temporary circuit setting digital switch 11 is "0". "0"
(in case of normal operation) 0pu7 decides to read out one circuit, and then decides to read out the first normal setting time of one circuit. And's Op'
U7 reads the first normal setting time of one circuit from RAM 1 and determines whether it matches the 1 clock signal. If they do not match, it is decided to read out the second one circuit. Then, cp'u7 determines whether or not all the normal setting times of one circuit have been read out. In this case, since all of them have not been read out, the second normal setting time of 11 circuits is read out and matches the 1 clock signal. Decide whether or not. This process is repeated until there is one that matches the clock signal among the normal set times for one circuit. If they match, the external relay 13 corresponding to one circuit is controlled to activate or stop one channel. After this, or if they do not match even after reading all the normal setting times for one circuit\
(3pu7 decides to read the ■ circuit. Then, it determines whether the ■ circuit exists or not, and in this case, ■
Since the circuit exists, 1) Compare the normal set time of the circuit and the clock signal in the same manner as described above, 1) If there is a match, send the external signal corresponding to the circuit via the output interface 15. A relay 17 is controlled to activate or stop one electric bell. (2) If all the normal set times of the circuit and the clock signal do not match, or if they coincide halfway, (2) Determine whether the circuit exists in the same manner as described above. In this case, since 1 exists, it is determined whether or not the normal set time of the circuit matches the clock signal. If there is a match, the external relay 19 corresponding to the circuit 1 is controlled via the input/output interface 15 to activate or deactivate the power source for 1 lighting. (1) If all the normal set times of the circuit and the clock signal do not match, or if they coincide halfway (2) Determine whether the circuit exists. In this case, since it does not exist (!pu7 is, for example, after processing such as changing the display of the time display section 21 via the input/output interface 15, and when the 1 clock signal changes to the next value,
In the same way as described above, it is again determined whether or not the normal set times of the 1st circuit, 2 circuit, and 2 circuit match the new time measurement signal. In the above case, the chime and bell may operate at the same time, but it is possible to select only one of them to operate depending on the user's operation.The four temporary set times are digitally set. switch 221
221vc is set. Judgment 1 as to whether or not these temporary set times and the clock signal match is 1. Judgment as to whether or not the normal set time of the circuit specified by the temporary circuit setting digital switch 11 matches the clock signal. It is done instead of doing something.

In other words, 1 and 1 temporary circuit setting digital switch: u
[If r2J is set, the CPU 7 first sets the setting value of the temporary circuit setting digital switch 11 to "0".
Determine whether or not. In this case, since the set value is not "0", 0pu7 judges whether one circuit is a circuit specified by the temporary circuit setting digital switch 11, but in this case, it is not the specified circuit. So 0pu
7 determines whether or not each normal setting time of one circuit matches the clock signal, and if there is a match, controls the external relay 13 corresponding to one circuit. When all the normal set times and the preset time signals of one circuit do not match, or when they coincide halfway, XOpυ7 determines whether or not a circuit exists. In this case, since 1 exists, 10pu7 determines whether the □circuit is the circuit specified by the temporary circuit setting digital switch l1vc. in this case,
Since the 1F circuit is a designated circuit, (!pt]7 reads out the set temporary time of the digital switch 22181? via the input/output interface 231 decoder 25, and determines whether it matches the clock signal or not. do.

If they do not match, the temporary set time set in the digital switch 222 is read and it is determined whether or not they match.

(Repeat 1 below) If they match -%Qp1] 7 controls the external relay 17. Controlled external relay 17.
When one or all of the temporary set times and the clock signal do not match, 0pu7 determines whether or not the circuit (2) exists.

In this case, since the circuit exists, the CPU determines whether or not the (1) circuit is the circuit set by the temporary circuit setting digital switch IIvc. In this case 1, since this is not the case, it is determined in the same manner as described above (2) whether or not the normal set time of the circuit and the clock signal match.

(2) When the judgment on the circuit is completed, Opu'7 judges whether or not the (1) circuit exists. In this case, since the 1■ circuit does not exist, % Q p u 7 is after processing such as changing the display of the time display section 21 via the input/output interface 15, and the 1 clock signal is changed to the next value. When this happens, repeat the same operation (9) as described above. In addition, 127 is RO1vl for control,
A cp'u'y control program has been written.

According to the method of the present invention, the set time for temporary use can be switched between the set time for temporary use and the set time for normal use by simply operating the digital switches 221 to 221K. □Since it can be rewritten, the work of rewriting RAM 1 can be omitted. Furthermore, any one of the I to 4N circuits of the RAMI can be changed to the temporary setting time simply by changing the set value of the digital switch for temporary circuit setting.

In the above embodiment, three RAM16C circuits are provided, but the number of circuits can be increased or decreased as desired. Also, what are the normal set time and temporary set time?

Although one common vc is provided, it is also possible to use a different number of vcs.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an apparatus used in the control method according to the present invention; FIG. 2 is a flowchart of the same method. (10) 1...RAM% for time setting 't...QT;)13
−． 9... LSI for time measurement-%11... Digital switch for temporary circuit setting, 221 to a21... Digital switch for temporary setting time. Patent applicant Agent: Toyo Jijoki Seisakusho Co., Ltd.
Tetsu Shimizu and 2 others (11) Shi P2 diagram

Claims (2)

[Claims] (1) Generate a clock signal whose value changes every time a predetermined time elapses in the clock signal generation circuit 1 Write the normal control time for at least one load into the storage device. Set the temporary control time for the load. 1. A switching digital switch is provided to generate a switching signal between the normal control time and the temporary control time. 1.When the switching signal is for normal use, each time the value of the clock signal changes. A. When the normal control time is read from the storage device and matches the time signal, the load is controlled. A: When the switching signal is for temporary use, the control time is read from the time setting digital switch every time the value of the time signal changes. Method 0 of reading the temporary control time and controlling the load at a set time when it matches the clock signal. (2) Provide a plurality of the above loads and write the normal control time for each of the loads into the storage device 1. When the switching signal is for normal use, read out the normal control time for each of the loads in order and match the clock signal. When this happens, the load corresponding to the normal control time is controlled, and the temporary switching signal is generated corresponding to each load, and the temporary control time is read out from the load specified by the temporary switching signal. The setting according to claim 1, characterized in that the specified load is controlled when the temporary control time coincides with the clock signal, and the specified load is controlled when the temporary control time coincides with the clock signal. How to control load at time of day.