JPS581887A - メインメモリのリフレッシュ制御方式 - Google Patents
メインメモリのリフレッシュ制御方式Info
- Publication number
- JPS581887A JPS581887A JP56099200A JP9920081A JPS581887A JP S581887 A JPS581887 A JP S581887A JP 56099200 A JP56099200 A JP 56099200A JP 9920081 A JP9920081 A JP 9920081A JP S581887 A JPS581887 A JP S581887A
- Authority
- JP
- Japan
- Prior art keywords
- refresh
- memory
- main memory
- access
- mac
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56099200A JPS581887A (ja) | 1981-06-26 | 1981-06-26 | メインメモリのリフレッシュ制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56099200A JPS581887A (ja) | 1981-06-26 | 1981-06-26 | メインメモリのリフレッシュ制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS581887A true JPS581887A (ja) | 1983-01-07 |
| JPH0241108B2 JPH0241108B2 (cg-RX-API-DMAC7.html) | 1990-09-14 |
Family
ID=14241002
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56099200A Granted JPS581887A (ja) | 1981-06-26 | 1981-06-26 | メインメモリのリフレッシュ制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS581887A (cg-RX-API-DMAC7.html) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59156262A (ja) * | 1983-02-25 | 1984-09-05 | Eitaro Suzuki | 麺帯圧延自動調整方法及びその装置 |
| JP2006512717A (ja) * | 2002-12-31 | 2006-04-13 | インテル コーポレイション | ダイナミックメモリのリフレッシュポート |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5345944A (en) * | 1976-10-06 | 1978-04-25 | Nec Corp | Refresh control system |
| JPS5461845A (en) * | 1977-10-27 | 1979-05-18 | Toshiba Corp | Refresh control system |
-
1981
- 1981-06-26 JP JP56099200A patent/JPS581887A/ja active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5345944A (en) * | 1976-10-06 | 1978-04-25 | Nec Corp | Refresh control system |
| JPS5461845A (en) * | 1977-10-27 | 1979-05-18 | Toshiba Corp | Refresh control system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59156262A (ja) * | 1983-02-25 | 1984-09-05 | Eitaro Suzuki | 麺帯圧延自動調整方法及びその装置 |
| JP2006512717A (ja) * | 2002-12-31 | 2006-04-13 | インテル コーポレイション | ダイナミックメモリのリフレッシュポート |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0241108B2 (cg-RX-API-DMAC7.html) | 1990-09-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5966725A (en) | Memory refreshing system having selective execution of self and normal refresh operations for a plurality of memory banks | |
| US5751994A (en) | System and method for enhancing computer operation by prefetching data elements on a common bus without delaying bus access by multiple bus masters | |
| JPH0359458B2 (cg-RX-API-DMAC7.html) | ||
| JP2014197446A (ja) | 有効データインジケータの使用によってダイナミックram電力消費を減らすシステムおよび方法 | |
| JPH0471223B2 (cg-RX-API-DMAC7.html) | ||
| US6285616B1 (en) | Memory refreshing control apparatus comprising a unique refreshing counter | |
| US4357686A (en) | Hidden memory refresh | |
| US5737564A (en) | Cache memory system having multiple caches with each cache mapped to a different area of main memory to avoid memory contention and to lessen the number of cache snoops | |
| JP2024535345A (ja) | プロセッサ作業負荷に基づくキャッシュサイズ変更 | |
| JPS581887A (ja) | メインメモリのリフレッシュ制御方式 | |
| US5479640A (en) | Memory access system including a memory controller with memory redrive circuitry | |
| JP4108237B2 (ja) | メモリ制御装置 | |
| JPH1011964A (ja) | メモリ制御装置およびメモリ制御方法 | |
| JP2726309B2 (ja) | メモリ制御方法および装置 | |
| JPH117763A (ja) | Dramリフレッシュ制御方法及びその回路 | |
| KR100656353B1 (ko) | 메모리 전력 소모를 줄이는 방법 | |
| JPH0785357B2 (ja) | Dramのリフレッシュ制御装置 | |
| JPS62134896A (ja) | メモリ制御方式 | |
| JPH07105082A (ja) | 高速メモリシステム | |
| JPH05151772A (ja) | リフレツシユ制御回路 | |
| JPH01290193A (ja) | Dramリフレッシュ制御方式 | |
| JPH07254272A (ja) | 半導体装置 | |
| JPH0462158B2 (cg-RX-API-DMAC7.html) | ||
| JPH0132136Y2 (cg-RX-API-DMAC7.html) | ||
| JP2570271B2 (ja) | 半導体メモリ制御装置 |