JPS5817689A - Manufacture of josephson circuit - Google Patents

Abstract

PURPOSE:To prevent the disconnection of a wiring layer while controlling the film thickness of an insulator accurately by improving a treatment process executed onto a substrate in the manufacture of the Josephson circuit. CONSTITUTION:A thin-film consisting of a superconducting substance such as Nb is evaporated or formed through a means such as RF sputtering onto the substrate 8 with a flat surface, such as Si, GaAo sapphire, etc., and a pattern 9 is manufactured through a means, such as lift-off, selective etching, etc. The insulator is applied onto the thin-film 9 in the thickness of approximately 1mum, and a coating film 10 is shaped. A thin-film 11 composed of a substance, the speed of etching thereof can be made slower than the coating film 10 such as Al, is formed onto the coating film 10. Corresponding predetermined regions on the superconducting layer 9 of the Al thin-film 11 are exfoliated, the coating film 10 is exposed, and the thin-film 11 and the coating film 10 are etched simultaneously. The coating film 10 is etched at uniform velocity extending over the whole surface when etching is continued, and etching is stopped when the surface of the superconducting layer 9 is exposed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a digital circuit, and more particularly to a method for manufacturing a digital circuit including a quantum interference device. In the figure, 1 is a substrate made of silicon or the like with a flat surface, 2 is a lower electrode made of a superconducting material such as Nb (Nb), Nb compound, or PB (lead) alloy, and 3 is a 5iO (-oxide) substrate. 4 is an upper electrode made of a superconducting material, 5 is an insulating layer, 6 is a control line, and 7 is a tunnel insulating film with a thickness of 10 (A). The upper electrode 4 and the lower electrode &2 form two tunnel junctions via a tunnel insulating film 7, and both electrodes are insulated by an insulating layer 3 in a region other than the tunnel insulating film 7.

Further, the two junctions are connected in parallel by both electrodes, and the insulating film 3 between the two liquids, the lower electrode 2 and the upper electrode 4 form a so-called inductive bridge.

Since the Joseph non-junction element has the fIR layer structure as described above, the control line 6 and the upper electrode 4 cross over multiple steps caused by the superconducting wiring 2 arranged in the lower layer and the openings in the insulating thin film. There is a need to arrange.

For this reason, in the conventional method of manufacturing a diode junction element, the film thickness is increased from the lower layer to the upper layer to prevent disconnection, but the shape of one element is reduced, and the wiring As the line width becomes narrower, there is a disadvantage that disconnections occur more often. Signal propagation lines also have the same drawbacks as mentioned above.

Furthermore, if a coated film is used as the first Ht) insulating thin films 3 and 5, the unevenness of the substrate surface can be smoothed out to some extent, but the thickness of the insulating film between the insulating thin films and the 'r4 junctions can be adjusted only by the coating conditions. In the zero-quantum interference lid element, which is difficult to control, the magnetic flux quantum (
Since the element 4I property changes periodically in units of magnetic flux corresponding to the size of 2X10'-"Wb), the thickness of the insulating layer 1130 is an important design parameter. It is indispensable to precisely control the wiring layer. The purpose of the present invention is to prevent disconnection of the wiring layer, which has been a problem in manufacturing the above-mentioned conventional circuit.

A second object of the present invention is to provide a method for manufacturing a dithering circuit that can accurately control the film thickness of an insulator selectively left on a lower electrode in a quantum interference history element or the like. Another object of the present invention is to selectively apply superconductivity to a flat region of the surface when forming the lower electrode on the substrate and an insulating layer covering the surface of the lower electrode. a step of forming a layer;
A process of coating the surface metal body, including the surface of the axillary superconducting layer, with a relatively thick layer of insulating material, and forming a thin film with a lower etching rate than the coating film on the surface where the coating was not applied. a step of removing only a corresponding predetermined region on the superconducting layer; and then a step of simultaneously etching the thin film from the surface and the coating film to extrude the predetermined region of the superconducting layer; This is achieved by the manufacturing method of the Sefson circuit. Hereinafter, l! Refer to page 11 to learn about an embodiment of the present invention! 08i (silico 7), GaAs (gallicum arsenic).

A thin film made of a superconducting Nb cape is formed on a flat substrate 8 with a surface such as a 7-layer film by means such as vapor deposition or high-frequency sloping, and then by means such as lift-off or selective etching as shown in FIG. The turf 9 shown in 1 is manufactured. In this ζ, the superconducting materials include Nb, Nb compound, P
b Kuragane etc. are used, and the film thickness is 1000 to 7000 (A)
II [O is then about 1 (JIm) on the thin film 9
An insulating material is applied to a film thickness of about
(No. 211b) As the coating film 10, the surface can be flattened by using, for example, polysilicone, etc. For example, the thickness of the superconducting layer Wkg is 5000 mm.

When the pattern width is 10 (sm), it has been confirmed that with this coating film 10, the unevenness on the surface of 5000 mm becomes less than zooooA on the surface of 1100 mm.

Thereafter, a thin film 11 made of a material capable of lowering the etching rate than the coating 1110 such as A1 is formed on the coating M2O. (FIG. 2C) The thickness of the thin film 11 is determined by the ratio of the thickness of the remaining coating 1[10 and the etching rate of the scissors coating 1[10 and the thin film 11].

For example, in dlcom, the AI film is formed with a film thickness of about 300 mm.

Next, as shown in FIG. 2d, a corresponding predetermined area on the superconducting layer 9 of the AI thin film is peeled off, and a coating film 10 is removed.
Then, the thin film 11 and the coating j[ilO are etched at the same time.

As an etching method, in order to simultaneously etch the boria 0 xane coating film and A1, we use CHP, gas, or apply active etching. ) Obtains an etching speed of approximately 400 (A/mln) in a QW atmosphere.

On the other hand, generally thin metal Il! The etching rate in reactant (pre-etching) is low; similarly, CHF, GAR-
, A/min.

As described above, since the difference in etching speed between the backside 10 and the thin film 11 is large, the thin film 11 on which the pattern is formed [11] acts like a mask for etching. Once the thin layer 11111 has been completely removed, the coating i! 10 has a depth of about 4 as shown in Figure 2 eK.
A concave portion of 000 (A) is formed. After this, if etching is continued, the coating film 10 will be etched uniformly and quickly over the entire surface, and the etching will be stopped when the surface of the superconducting layer 9 is exposed. Stop. (Fig. 2 f) The film thickness of the central convex part 12 of the remaining posterior ventral lO is the coating film 13 (equivalent to the depth of the recessed part D, approximately 4000<AI; that is, in the present invention, the thickness of the thin film 11 ( 2) The film thickness is X, and the etching rate of the coating film 10 and the axillary gland 11 is p
/ml n, ), q (A/ml n,), the thickness of the coating 112 remaining on the superconducting layer 9 is p
x/q becomes a prisoner.

As described above, according to the present invention, it is possible to flatten the irregularities on the surface of a single plate caused by the superconducting layer, and to leave the antinode corresponding to the inductive bridge part of the quantum interference device with an accurate film thickness. In addition, the application of the present invention is not limited to the superconducting layer formed on the surface of the substrate and the insulating coating covering the superconducting layer. It can also be applied to membranes.

FIG. 3 shows an embodiment in which the present invention is applied to superconducting wiring 15. 2, the drawing numbers that are the same as those in FIG. 2 indicate the same regions. After forming the superconducting wiring 15, a coating film 16 made of the same polysiloxane is formed in the same steps as the next step as shown in FIG. In addition to opening the window at the joint, the superconducting wiring 1115 and control line 1 shown in Figure 3
7, it is also possible to form contact holes between superconducting wirings.

[Brief explanation of the drawing]

Figure 1 shows a cross-sectional schematic diagram of a normal di-Sefson circuit, and Figure 2
Figures a to f show an example of a method for manufacturing a seven-channel circuit according to the present invention, and Figure 3 shows an example of a circuit formed by a method for manufacturing a seven-channel circuit according to the present invention. 1.8 in the figure represents the board, 2.4.6.9.13.15.1
7 indicates a superconducting layer, 3.5.10.12.16 indicates a coating film made of an insulator, 7.14 indicates a tunnel insulating film, and 11 indicates a thin film such as a metal film.

Claims (1)

[Claims] One method is to selectively form a superconducting layer on a flat area of the surface, the other method is to apply a relatively thick insulating material to the entire surface including the superconducting layer surface and allow the nuclide to form on the surface. Forming a thin film having a lower etching rate than the coating film on the film surface, and removing a contrasting predetermined region on the superconducting layer of the thin film.
1. A method for manufacturing a silocephalon circuit, comprising the steps of etching a thin scissors film and the coating film from the surface at the same time to expose a predetermined region tt of the superconducting layer.