JPS5815935B2 - hand tai souchi no seizou houhou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of forming a diffusion layer in a semiconductor substrate.

An object of the present invention is to form an N-type diffusion layer and a P-type diffusion layer on a semiconductor substrate by growing oxide films doped with N-type and P-type impurities in a vapor phase, respectively, and selectively etching them to form desired layers. After obtaining the pattern, various advantages can be obtained by performing simultaneous diffusion.

Conventional diffusion methods are as follows, and they have various drawbacks and are not satisfactory.

In other words, in the conventional method, the P-type and N-type must be diffused twice, and the layer that is diffused first will be expanded during the next diffusion heat treatment, so a margin for this was taken into consideration. Masks must be designed.

In addition, because photoetching is performed twice, once for N-type diffusion and once for P-type diffusion, current photoetching technology requires a 2-3μ misalignment to be expected for pattern alignment, which makes it difficult to maintain sufficient breakdown voltage. If this is desired, the mask must be designed to allow for this.

This has a great effect on the chip size and is a big problem for multi-integration ICs.

The present invention eliminates these drawbacks by simultaneously diffusing N-type and P-type.

That is, the method of the present invention is as follows.

When forming an N-type diffusion layer and a P-type diffusion layer on a semiconductor substrate, first an oxide film containing one impurity is grown in a vapor phase, and then unnecessary portions of this film are removed by selective etching.

Furthermore, another oxide film containing impurities is similarly grown on this film, and unnecessary portions are removed by selective etching.

An oxide film containing no impurities is grown on this to prevent impurities from affecting other parts.

After these steps are completed, depending on the required temperature, P type,
N-type diffusion is performed simultaneously to obtain each diffusion layer.

Examples of the present invention will be described in detail below.

Embodiment In the present invention, an example using an N-type silicon single crystal substrate will be described.

A boron silicate glass (hereinafter abbreviated as BSG) film 2 is formed on an N-type silicon substrate 1 by vapor phase growth.

Note that since the growth is performed at a low temperature, contamination with impurities is not a problem.

This film is photo-etched to remove unnecessary portions 3 as shown in FIG.

Further, a phosphosilicate glass (hereinafter abbreviated as PSG) film 4 is formed thereon by vapor phase growth.

Thereafter, by photo-etching, the portions 5.degree. 6 where diffusion is not performed in both the BSG film and the PSG film are removed as shown in FIG.

In order to protect the removed portion from impurity contamination, a SiO□ film 7 is grown in vapor phase thereon.

After this, the BSG film, PS
Simultaneous diffusion is performed in the silicon substrate using the G film to obtain a P-type diffusion layer 8 and an N-type diffusion layer 9, respectively.

As explained above, by using the method according to the present invention, it is possible to simultaneously position the N-type and P-type diffusion layers,
Furthermore, simultaneous diffusion makes it possible to reduce the diffusion depth.

These features make it possible to reduce the chip size, which is a problem when performing large-scale integration.

[Brief explanation of drawings]

1 to 4 are cross-sectional views showing the process of the present invention. 1 is a silicon single crystal substrate, 2 is a BSG film, 3 is a portion where the BSG film is removed by photoetching, 4 is a PSG film, 5,
6 is an N-type diffusion layer, a portion removed to position the P-type diffusion layer, 7 is a 5i02 film, 8 is a P-type diffusion layer, and 9 is an N-type diffusion layer.

Claims (1)

[Claims] A method for manufacturing a semiconductor device in which impurities are diffused into a semiconductor substrate by a first oxide film containing impurities of a conductivity type 1- and a second oxide film containing impurities of another conductivity type,
After the first oxide film is vapor-phase grown on the substrate and selectively etched, the second oxide film is grown on the substrate, and then the first oxide film and the second oxide film are grown in a single layer. 1. A method for manufacturing a semiconductor device, characterized in that selective etching is carried out simultaneously in two phosphor steps.