JPS628939B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method of manufacturing isolation between elements of a high-density integrated circuit device.

Conventionally, the process for separating elements of an integrated circuit device has been performed in a process different from the process for forming circuit elements. If the impurity used for isolation and the impurity used for element formation are the same, or at least of the same conductivity type, a margin must be provided so that these impurity regions do not connect. The margins include one for the lateral spread of impurities and one for alignment during the photo-etching process in each process. Due to this margin, there is a limit to the improvement in the degree of integration of integrated circuit devices.

An object of the present invention is to completely eliminate the alignment allowance in the photolithography process between processes that was required in the conventional technology, thereby making it possible to manufacture integrated circuit devices with a high degree of integration. The purpose is to provide a method.

The semiconductor device manufacturing method of the present invention includes the steps of forming a semiconductor epitaxial layer of another conductivity type on a semiconductor substrate of one conductivity type, and forming an oxidation-resistant material on first and second predetermined regions of the epitaxial layer. forming an oxide film on the surface of the epitaxial layer using the insulating film as a mask; and forming an oxide film on the surface of the epitaxial layer using the oxide film as part of the mask. forming an insulating isolation region of one conductivity type that reaches the substrate by introducing impurities into the substrate; and removing the insulating film on the second predetermined region to form a circuit element in the region. It is characterized by:

According to the invention, the first layer of the epitaxial layer
An oxidation-resistant insulating film pattern is simultaneously provided on the first and second predetermined regions, and an insulating isolation region and a circuit element are respectively formed on the first and second predetermined regions, so that alignment of the patterns with each other is controlled. The margin can be reduced to zero, and the degree of integration of the semiconductor device can be increased.

That is, after forming an oxide film on the surface of a region other than the insulating film pattern containing an oxidation-resistant material, the oxidation-resistant insulating film is selectively removed to form an oxide film pattern, and the pattern is used to form an oxide film pattern. This is because insulation isolation regions and circuit elements can be formed.

Hereinafter, the present invention will be explained in detail based on Examples.

1 to 7 show cross-sectional views of the main manufacturing steps.

After forming an N-type epitaxial layer 12 on the surface of a P-type semiconductor (for example, silicon) substrate 11, a thin silicon oxide film 13 is formed by thermal oxidation, and a silicon nitride film is further formed on the surface of the silicon oxide film by vapor phase growth. 14 (Figure 1).

Next, photoresist films 15, 15', 15'' are selectively formed by photolithography, and using the photoresist film as a mask, the silicon nitride film 15, 15', 15'' is selectively formed.
4. Remove the silicon oxide film 13 in sequence (second
figure).

Next, the photoresist films 15, 15', 1
5", the remaining silicon nitride film 1
4, 14', 14'' and silicon oxide films 13, 1
3' and 13'' are used as masks to form a silicon oxide film 16, on the surface of the epitaxial layer 12 that is not covered with the silicon nitride film and the silicon oxide film.
16' is formed to a thickness of about 0.5 μm (Fig. 3).

Next, a photoresist film 17, 17' is selectively formed by photolithography, and the remaining silicon nitride film 14 and silicon oxide film 1 are left behind using the photoresist film and the silicon oxide film 16, 16' as a mask.
3 (Figure 4). At this time, if Freon plasma, for example, is used to remove the silicon nitride film 14, it can be selectively removed without affecting the silicon oxide films 16, 16'. Since the film 13 is very thin, it can be removed without substantially reducing the thickness of the silicon oxide films 16, 16'. As described above, this process can remove only the desired regions 18, 18' in a self-aligned manner even if the pattern of the photoresist film extends beyond the regions 18, 18' to be removed.

Next, after removing the photoresist films 17 and 17', boron is thermally diffused through the openings provided in the above step, and simultaneously thermally oxidized to connect the boron diffused region 19 to the semiconductor substrate 11. The surface of the epitaxial layer that is not covered with the silicon nitride films 14', 14'' and the silicon oxide films 13', 13'' is covered with a thick silicon oxide film 101. As a result, the epitaxial layer is formed into a plurality of islands 1 surrounded by a P-N junction and a thick silicon oxide film 101.
2', 12'', and 12 (Fig. 5).Instead of the above-mentioned thermal diffusion of boron, boron may be introduced by ion implantation, and in that case, the photoresist films 17, 17' are separated. Ion implantation is performed with these films left on, and then the photoresist film and silicon nitride film are removed.

Next, after removing the remaining silicon nitride films 14', 14" and silicon oxide films 13', 13", a base region 102 is formed in the island, an emitter region 103 is formed in the base region, and a collector region is used for taking out an electrode. High concentration regions 104 are formed and their surfaces are covered with oxide films 105, 105' (FIG. 6).

Next, openings reaching the respective regions 102, 103, 104 are selectively provided in the oxide films 105, 105', and then a metal electrode 10 is formed to cover the openings.
6, 106', and 106'' are selectively provided to complete the transistor (FIG. 6).

The embodiments of the present invention have been described above, but the main part of the present invention is to simultaneously form a pattern for forming an insulation isolation region and a pattern for forming a circuit element region, and to reduce the alignment margin between the patterns to zero. To this end, the pattern is an insulating film containing an oxidation-resistant material, and the surface of other regions is covered with an oxide film. Therefore, the circuit elements formed within the island are not limited to transistors, but can also be diodes, resistors, etc., and by changing the conductivity type, not only NPN transistors but also PNP transistors can be used. or,
It can also be applied to integrated circuit devices including these.

Furthermore, the present invention is also applicable to a semiconductor device having a so-called buried layer between a semiconductor substrate and an epitaxial layer.

[Brief explanation of the drawing]

1 to 7 are cross-sectional views of the manufacturing process of an embodiment of the present invention. In the figure, 11...semiconductor substrate, 12...
Epitaxial layer, 13, 16, 101, 105
...Silicon oxide film, 14...Silicon nitride film,
15, 17...photoresist film, 19...insulating isolation region, 102...base region, 103...emitter region, 104...collector electrode extraction region, 106...metal electrode.

Claims (1)

[Claims] 1. A step of forming a semiconductor epitaxial layer of one conductivity type on a semiconductor substrate of another conductivity type, and a step of simultaneously providing an insulating film containing an oxidation-resistant material on the first and second predetermined regions of the epitaxial layer. forming an oxide film on the surface of the epitaxial layer using the insulating film as a mask; and introducing an impurity into the first predetermined region of the epitaxial layer using the oxide film as a part of the mask to remove the substrate. manufacturing a semiconductor device, comprising the steps of: forming an insulating isolation region of one conductivity type, and removing the insulating film on the second predetermined region to form a circuit element in the region. Method.