JPS58151034A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a protection film having no pin holes and cracks by burying an MESA groove provided on a semiconductor element with a passivation film consisting of a multielement system low melting point glass material and using an acid and chemicals resistant glass material as a protection film at the time of providing thereon a protection film. CONSTITUTION:A P type base layer 12 is grown on an N<+> type semiconductor substrate 11 consisting of the N<-> type upper layer and N<+> type lower layer, the N<+> emitter region is provided therein and the surface is covered with an SiO2 film 14 at the entire part. Then, an MESA groove 16 which enters the N<-> type layer from the surface is formed by etching and such groove is filled with a passivation film 17 consisting of a multi-element system low melting point glass material by the electrophoresis method. Thereafter, a liquid silica compound is coated to the entire surface while it is included therein, the surface is preheated for 20min at a temperature 150 deg.C, then an element is baked for 30min at a temperature 400 deg.C within the mixed gas of N2 and O2. Thus a glass protection film 19 can be obtained. Thereby, the CVD apparatus is not required and a thin film can be used as a sufficient protection film.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to the use of a glass 9-pipe, for example, in a mesa groove.
The present invention relates to a semiconductor device for high voltage resistance.

[Technical background of the invention]

Various structural improvements have been made to high voltage transistors and the like. 1111im shows the configuration cross section m1g of a typical high voltage transistor. 11 is the N-on which becomes the collector region. A semiconductor substrate has two layers 12 formed thereon to serve as space regions, and a sheathed ivy region 13 is formed by diffusion on the upper surface of the two layers 12. 14
is a silicon oxide film mask that separates the pace region and the engineered Z vine region IJ, and a pace electrode @11b% esetter electrode IJ is made of aluminum on the second layer 11 and the engineered vine region 13, respectively. It is formed by vapor deposition. 916 is a rounded mesa groove that increases the pressure resistance between the pace and collector. And the mesa groove 1gK is exposed 2
In order to maintain the pN junction S between the layer 11 and the N-on N+ semiconductor substrate 11, a low melting point glass of 2B-0 series, which has excellent electrical properties, is embedded in this mesa @It. /For example, the film 11 is made of 4111 ・ζO pad page 1111'' is coated with acid-resistant and chemical-resistant P.
IG film 1# is deposited.

In such a red structure high voltage transistor, glass is first applied to the PN junction part of the mesa groove 16 by electrophoresis.
(by silk screen method etc.) 1 then 600
It is fixed by firing at a temperature of ℃ to 700℃. This firing temperature is higher than the temperature of the heat treatment process in process 11 (aluminum 7 evaporation process 1!1 aluminum electrode sintering process Ii) for forming aluminum electrodes such as the pace electrode Jlb resin ivy @Jj@. Target 4 $11 is excellent - The multi-component (Z*-0 system) O low melting point glass used as the mother glass film is a glass with a high temperature, and it can be directly applied to the glass Δ, the film, and the If the membrane surface box is exposed, it will be immersed.For this reason, the mesa groove 16 has ft, l-/armpit space,
After forming the film 11 by firing, the acid-resistant piG film 1# is deposited on this glass arm plate by CVD.
After that, a step of forming an aluminum electrode is performed. The PEG film 1a has the disadvantage that there are a large number of pinholes caused by large variations in film thickness.9.These pinholes can be reduced by making the PSG film 11 sufficiently thick. However, on the contrary, cracks are more likely to occur in the film. Furthermore, the thickness of the PSG film 11 is limited also from the viewpoint of productivity. On the other hand, if the thickness of the PIG film 1# is set to a practical value, it will not be possible to sufficiently protect the glass padding film 11 from acids during the etching process, which may cause a decrease in product retention. It had become.

[Purpose of the invention]

This invention was developed in view of the above-mentioned points, and it is possible to improve reliability against acidic chemicals by applying a film to a glass/arm surface without using a P2O film produced by the CVD method, which is prone to cracking due to one-hole damage caused by Hiro, Ri, etc. [Summary of the Invention] That is, the semiconductor device according to the present invention has a structure in which a liquid silica compound is applied onto a semiconductor substrate as a glass pad, and a film with high maintenance properties. However, it uses a glass protective film formed by baking heat treatment at an appropriate temperature.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. FIGS. 2(4) to 2(4) are diagrams for explaining the structure of an arm transistor with an I-rath □y-shiba, as an example, along with a manufacturing factory.

First, as shown in FIG.
A silicon oxide film 14 is formed on the semiconductor substrate 1110 that meets the semiconductor substrate 1110.

Next, (B) lllK shows t! 5K, viscosity [300 (cp
) 7 otoresist on the front and back as an etching mask, 9 Chemical Chemistry, Chindakai 9 is a grade! After that, a mesa groove 1# is formed on the semiconductor substrate 10 to reach the N-on resistant semiconductor substrate 11. After that, an additive that gives an electric charge to the glass plate and the glass wheel is added to the alcohol. Glass is selectively adhered to the mesa groove 16 portion of the semiconductor substrate 10 by electrophoresis by adding and stirring the glass and dipping it into the glass solution with an electrode set. After that, 600℃~700℃
The glass is fired in an oxygen atmosphere at a temperature of A glass/mother plate film 11 is formed.

Next, a 1[-shaped silica compound is applied to the main surface of the semiconductor substrate 10 using a spinner or the like, for example, at a concentration of 2,000 to 400
G (rptml
Make sure to cover the top completely. ・Then, open the silica compound at 150℃ for 20 minutes, then bake the silica compound at 400℃ for 30 minutes in a mixed gas atmosphere of nitrogen and oxygen. A glass protective film 19 made of a sintered silica compound is formed as shown in FIG. This glass protective film 14 has a film thickness of 1 to 2 μm (111L). As shown in the figure, photolithography is used to print t[l] on the silicon oxide film 14 and the glass protective film 19. Openings 11j41 for arm turning are provided. After that, an aluminum layer 15 is formed on the main surface of the semiconductor substrate 10 as shown in the lead diagram.

Next, (2) as shown in the figure, the aluminum layer 11 is photo-etched, and an EITTA electrode 1 is placed on the NIO, T area 13.
Step 5: Place the pace electrode 11b on the first layer 12, respectively. tk, PAN liquid (CH, Coon, HNO, e II
, PO41H2O) is used. ζ0PAN1
1L generally immerses the glass film 11 in the mesa groove 16, but the glass protective film 1# allows this 7g film 11 to be immersed in the PAN tank.
After that, this conductor base 1 [10 is divided into semiconductor pellets and used as lead-out leads that also serve as bases for -4V! The work is completed by tying, wiring, finishing and finishing.

Glass arm, sheath, and membrane formed in this way 1
Compared to the conventional PSG protective film, the glass protective film No. 1 has no pinholes caused by hillocks caused by the adoption of the CVD method, and there is less variation in film thickness. The thickness can be made thinner and there is no risk of cracking.In addition, the silica compound can be applied several times as needed, and it can also be used to prevent pinholes caused by other than holes and rips, such as minute holes. It is valid. Cv, which is generally a larger device than a spinner,
Even without using the D device, glass, sheet, and film 1
Forming only one glass protective film on the substrate is advantageous in terms of equipment and equipment.

In addition, in Example 1 above, the case of a glass ΔT film in the V'' groove part of a power transistor of a% NPM will be explained. It is clear that the method can be applied to various other semiconductor devices.

〔Effect of the invention〕

As described above, according to the present invention, the glass
By using a glass protective film formed by baking silicified food as a protective film for the main film, the film can be thin enough without requiring very large equipment. By forming a protective film that has fewer pinholes and no risk of scratches or scratches, it improves product yield and provides advanced conductor equipment.

[Brief explanation of drawings]

Figure 1 is a sectional view showing the configuration of a conventional semiconductor device;
Figures 1 to 2 are diagrams showing an embodiment of the semiconductor device according to this invention, together with a schematic diagram of its construction. JJ-N-on-semiconductor substrate, 11...PaP layer, 1#-
・Metill, Jf-Glass/Archives, Membrane, 1
＃-・Glass protective film・

Claims (1)

[Claims] In semiconductor devices that have been coated with a multi-component low-melting-point glass film, the protective film on the glass film is coated with an acid-resistant, chemical-resistant glass film.
A semiconductor device stand characterized by a film