JPH03138935A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH03138935A JPH03138935A JP27490889A JP27490889A JPH03138935A JP H03138935 A JPH03138935 A JP H03138935A JP 27490889 A JP27490889 A JP 27490889A JP 27490889 A JP27490889 A JP 27490889A JP H03138935 A JPH03138935 A JP H03138935A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- intermediate insulating
- film
- heat treatment
- application liquid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 16
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 238000000576 coating method Methods 0.000 claims abstract description 34
- 239000011248 coating agent Substances 0.000 claims abstract description 33
- 239000007788 liquid Substances 0.000 claims abstract description 26
- 238000000034 method Methods 0.000 claims abstract description 23
- 238000010438 heat treatment Methods 0.000 claims abstract description 20
- 239000011521 glass Substances 0.000 claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 150000003377 silicon compounds Chemical class 0.000 claims abstract description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 238000004528 spin coating Methods 0.000 abstract 1
- 230000001737 promoting effect Effects 0.000 description 5
- 238000010304 firing Methods 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 238000005245 sintering Methods 0.000 description 2
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 238000001354 calcination Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
Landscapes
- Local Oxidation Of Silicon (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
この発明は半導体装置の製造方法に関し、特にケイ素化
合物からなる膜形成用塗布液を用いた中間絶縁膜の平坦
化促進法に関するものである。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for promoting planarization of an intermediate insulating film using a film-forming coating liquid made of a silicon compound.
（従来の技術）
半導体装置においては、素子を形成した半導体基板（下
地部）と上層のメタル配線間に中間絶縁膜が形成される
。この中間絶縁膜としてはＰＳＧ膜やＢＰＳＧ膜が使用
されるが、その上のメタル配線を段切れなく形成するた
めに表面が平坦であることが重要である。(Prior Art) In a semiconductor device, an intermediate insulating film is formed between a semiconductor substrate (underlying portion) on which elements are formed and an upper layer of metal wiring. A PSG film or a BPSG film is used as this intermediate insulating film, and it is important that the surface be flat in order to form the metal wiring thereon without interruption.
そこで、通常は、中間絶縁膜形成後、８００〜９５０℃
の高温で熱処理を行って、中間絶縁膜の流動化によりそ
の表面を平坦とするガラスフローが行われている。Therefore, after forming the intermediate insulating film, the
Glass flow is performed in which the intermediate insulating film is fluidized and its surface is flattened by heat treatment at a high temperature.
しかるに、中間絶縁膜上にピッチ２．０ｐ以下のｉ細な
メタル配線を高精度に形成する場合には、上記ガラスフ
ローだけの平坦化では不充分である。However, when forming i-thin metal wiring with a pitch of 2.0p or less on an intermediate insulating film with high precision, planarization using only the glass flow described above is insufficient.
そこで、中間絶縁膜の平坦化をより促進させる一つの方
法として、中間絶縁膜の下層にて、ケイ素化合物からな
る膜形成用塗布液を使用することが行われている。Therefore, as a method for further promoting planarization of the intermediate insulating film, a coating liquid for forming a film made of a silicon compound is used in the lower layer of the intermediate insulating film.
その場合、その後の工程でケイ素化合物自体が変化して
（焼成化が進行して）種々の問題（クラックや剥離ある
いはフクレ）が生じないように、従来は、次工程（中間
絶縁膜の堆積工程）に進む前に、その後の熱処理（ガラ
スフロー）と同等温度またはそれ以上の高い温度で膜形
成用塗布液の焼成化を終了させている。In that case, in order to prevent the silicon compound itself from changing in the subsequent process (as sintering progresses) and causing various problems (cracks, peeling, or blisters), conventionally, the next process (intermediate insulating film deposition process) ), the film-forming coating liquid is baked at a temperature equal to or higher than that of the subsequent heat treatment (glass flow).
（発明が解決しようとする課題）
しかるに、中間絶縁膜の形成前に膜形成用塗布液の焼成
化を終了させる方法では、その時の熱処理と、その後の
中間絶縁膜ガラスフローのための熱処理の計２回、８０
０℃以上の高温熱処理が中間絶縁膜平坦化のために必要
となるので、拡散層の接合深さが浅いサブミクロンデバ
イスには適用することができなかった。(Problem to be Solved by the Invention) However, in the method of finishing the firing of the coating solution for film formation before forming the intermediate insulating film, it is difficult to plan the heat treatment at that time and the heat treatment for the subsequent flow of the intermediate insulating film glass. 2 times, 80
Since high-temperature heat treatment at 0° C. or higher is required to flatten the intermediate insulating film, it could not be applied to submicron devices in which the junction depth of the diffusion layer is shallow.
この発明は上記の点に鑑みなされたもので、ケイ素化合
物からなる膜形成用塗布液を用いた中間絶縁膜の平坦化
促進法をサブミクロンデバイスにも適用可能とする半導
体装置の製造方法を提供することを目的とする。The present invention has been made in view of the above points, and provides a method for manufacturing a semiconductor device in which a method for promoting planarization of an intermediate insulating film using a coating liquid for forming a film made of a silicon compound can be applied to submicron devices. The purpose is to
（ｙＡ題を解決するための手段）
この発明では、中間絶縁膜形成前の半導体基板表面に、
ケイ素化合物からなる膜形成用塗布液をコーティングし
、その後、該塗布液の未焼成状態で全面に中間絶縁膜を
形成し、次いで前記膜形成用塗布液の焼成と前記中間絶
縁膜のガラスフローとを同一熱処理により行う。(Means for solving the yA problem) In this invention, on the surface of the semiconductor substrate before forming the intermediate insulating film,
Coating with a film-forming coating liquid made of a silicon compound, then forming an intermediate insulating film on the entire surface with the coating liquid in an unfired state, and then baking the film-forming coating liquid and glass flow of the intermediate insulating film. are performed by the same heat treatment.
（作 用）
本発明者は、ケイ素化合物からなる膜形成用塗布液の焼
成化熱処理に伴う挙動を調査した。その結果、■焼成化
に伴い、放出ガス（水分）の発生が塗布液から生じるこ
と、■未焼成塗布液上に中間絶縁膜（ＰＳＧ膜またはＢ
ＰＳＧ膜）を約４００℃でＣＶＤ法により形成し、その
後焼成化熱処理（〜９５０℃）を行うと、前記放出ガス
が中間絶縁膜を通して放出されること、を見出した。(Function) The present inventor investigated the behavior of a film-forming coating liquid made of a silicon compound upon calcination heat treatment. As a result, (1) release gas (moisture) is generated from the coating solution during firing, and (2) an intermediate insulating film (PSG film or B
It has been found that when a PSG film is formed by a CVD method at about 400° C. and then subjected to a sintering heat treatment (up to 950° C.), the released gas is released through the intermediate insulating film.
つまり、本発明者は、未焼成塗布液上に中間絶縁膜を形
成した後に焼成化のための熱処理を行っても、−向に問
題ないことを見出した。In other words, the inventors have found that there is no problem even if heat treatment for firing is performed after forming the intermediate insulating film on the unfired coating liquid.
この発明は、上記知見に基づいて完成したもので、上記
のように未焼成塗布液上に中間絶縁膜を形成した後、塗
布液の焼成と中間絶縁膜のガラスフローとを同一熱処理
により行う。この方法によれば、塗布液による中間絶縁
膜の平坦化促進法を導入したにも係わらず、高温熱処理
は、ガラスフローだけを行う場合と同様に唯一回であり
、サブミクロンデバイスにも適用できる。そして、サブ
ミクロンデバイスにおいて中間絶縁膜の大幅な平坦化向
上を可能とし、勿論塗布液の焼成化に伴うクランクや剥
離などの問題も生じない。This invention was completed based on the above knowledge, and after forming an intermediate insulating film on an unfired coating liquid as described above, baking of the coating liquid and glass flow of the intermediate insulating film are performed in the same heat treatment. According to this method, although a method of promoting planarization of the intermediate insulating film using a coating solution has been introduced, high-temperature heat treatment is performed only once, similar to when only glass flow is performed, and it can be applied to submicron devices. . Further, in submicron devices, it is possible to significantly improve the planarization of the intermediate insulating film, and of course, problems such as cranking and peeling caused by baking the coating solution do not occur.
（実施例） 以下この発明の一実施例を第１図を参照して説明する。(Example) An embodiment of the present invention will be described below with reference to FIG.
第１図ｔａ＋は、素子形成を終了した中間絶縁膜形成前
の半導体基板ｌを示し、２はフィールド酸化膜、３はＭ
ＯＳ）ランジスタのゲート電極、４はフィールド酸化膜
２上に形成された電極配線層である。FIG. 1 ta+ shows the semiconductor substrate l after element formation has been completed and before the formation of an intermediate insulating film, 2 is a field oxide film, 3 is an M
OS) A transistor gate electrode 4 is an electrode wiring layer formed on the field oxide film 2.
この半導体基板１の表面全面に、ケイ素化合物からなる
膜形成塗布液５ （例えば東京応化社製ＯＣＤ （商品
名））をスピンコード法で第１図（ト））に示すように
コーティングする。この時、コーティング膜厚は、塗布
液５の種類や繰り返しコーティング回数などにより異な
るが、５００人〜４０００人の範囲である。この塗布液
５のコーティングにより、半導体基板１表面の段差は軽
減される。The entire surface of the semiconductor substrate 1 is coated with a film-forming coating liquid 5 made of a silicon compound (for example, OCD (trade name) manufactured by Tokyo Ohka Co., Ltd.) by a spin code method as shown in FIG. 1 (G). At this time, the coating film thickness varies depending on the type of coating liquid 5 and the number of repeated coatings, but is in the range of 500 to 4000 coats. By coating with this coating liquid 5, the level difference on the surface of the semiconductor substrate 1 is reduced.
次に、膜形成用塗布液５の溶剤の蒸発およびガラス化を
目的とした熱処理を〜３００℃で行う。Next, heat treatment is performed at ~300° C. for the purpose of evaporating the solvent of the film-forming coating liquid 5 and vitrifying it.
その後、基［１上の全面に第１図（ｃ）に示すように中
間職＆！Ｉ＊６を形成する。この中間絶縁膜６としては
具体的にはＰＳＧ膜またはＢＰＳＧ膜を常圧ＣＶＤ法、
減圧ＣＶＤ法あるいはＴＥＯ３ＣＶＤ法で４０００人〜
１００００人の厚さに形成する。After that, as shown in Figure 1 (c) on the entire surface of the group [1], intermediate positions &! Form I*6. Specifically, as the intermediate insulating film 6, a PSG film or a BPSG film is formed using an atmospheric pressure CVD method.
4000 people or more using low pressure CVD method or TEO3CVD method
Formed to a thickness of 10,000 people.
その後、膜形成用塗布液５の焼成化と中間絶縁１Ｉ１６
のガラスフローを目的とした熱処理を８００℃〜９５０
℃の高温で実施する。この高温熱処理により、膜形成用
塗布液５が焼成される。同時に中間絶縁膜６が流動化し
、その表面は第１図（８＋に示すように平坦となる。し
かも、この方法では、塗布液５のコーティングにより基
Ｆｉ１の表面の段差が軽減されていることにより、第１
図（ｃ）の工程で中間絶縁膜６を形成するだけでもその
表面の平坦性は改善されることになり、それに上記のよ
うに流動化（ガラスフロー）を加えることにより前記第
１図（８１に示すように中間絶縁膜６の表面ば大幅に平
坦となる。After that, baking the coating liquid 5 for film formation and intermediate insulation 1I16.
Heat treatment for the purpose of glass flow from 800℃ to 950℃
Perform at high temperature of °C. By this high-temperature heat treatment, the film-forming coating liquid 5 is baked. At the same time, the intermediate insulating film 6 becomes fluidized, and its surface becomes flat as shown in FIG. , 1st
Simply forming the intermediate insulating film 6 in the process shown in FIG. As shown in FIG. 2, the surface of the intermediate insulating film 6 becomes significantly flat.
以上で、塗布液による平坦化促進法を導入した中間絶縁
膜の形成工程を終了する。This completes the process of forming the intermediate insulating film in which the planarization promotion method using the coating liquid is introduced.
（発明の効果）
以上詳細に説明したように、この発明の製造方法によれ
ば、膜形成用塗布液の未焼成状態で全面に中間絶縁膜を
形成し、その後、前記塗布液の焼成と中間絶縁膜のガラ
スフローとを同一熱処理により行うようにしたので、塗
布液による中間絶縁膜の平坦化促進法を導入したにも係
わらず、高温熱処理は、ガラスフローだけを行う場合と
同様に唯一回だけとすることができ、サブミクロンデバ
イスにも適用できる。そして、サブミクロンデバイスに
おいて中間絶縁膜の大幅な平坦化が可能となるものであ
る。(Effects of the Invention) As explained in detail above, according to the manufacturing method of the present invention, an intermediate insulating film is formed on the entire surface of the unbaked state of the coating solution for film formation, and then the coating solution is baked and the intermediate insulating film is Since the glass flow of the insulating film and the glass flow of the insulating film are performed using the same heat treatment, even though we have introduced a method for promoting flattening of the intermediate insulating film using a coating solution, the high temperature heat treatment is performed only once, just like when only the glass flow is performed. It can also be applied to submicron devices. Furthermore, it is possible to significantly planarize the intermediate insulating film in submicron devices.
第１図はこの発明の半導体装置の製造方法の一実施例を
示す工程断面図である。
ｌ・・・半導体基板、５・・・膜形成用塗布液、６・・
・中間絶縁膜。FIG. 1 is a process sectional view showing an embodiment of the method for manufacturing a semiconductor device of the present invention. l...Semiconductor substrate, 5...Coating liquid for film formation, 6...
・Intermediate insulating film.
Claims (1)
合物からなる膜形成用塗布液をコーティングし、 （ｂ）その後、該塗布液の未焼成状態で全面に中間絶縁
膜を形成し、 （ｃ）次いで前記膜形成用塗布液の焼成と前記中間絶縁
膜のガラスフローとを同一熱処理により行うことを特徴
とする半導体装置の製造方法。[Scope of Claims] (a) A coating solution for forming a film made of a silicon compound is coated on the surface of a semiconductor substrate before formation of an intermediate insulating film, and (b) Thereafter, the intermediate insulating film is coated on the entire surface of the coating solution in an unbaked state. A method for manufacturing a semiconductor device, characterized in that a film is formed, and (c) the baking of the film-forming coating liquid and the glass flow of the intermediate insulating film are performed in the same heat treatment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27490889A JPH03138935A (en) | 1989-10-24 | 1989-10-24 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27490889A JPH03138935A (en) | 1989-10-24 | 1989-10-24 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03138935A true JPH03138935A (en) | 1991-06-13 |
Family
ID=17548210
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27490889A Pending JPH03138935A (en) | 1989-10-24 | 1989-10-24 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03138935A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100292403B1 (en) * | 1997-12-30 | 2001-07-12 | 윤종용 | Interlayer dielectric film of semiconductor device and method for forming film |
| JP2019513294A (en) * | 2016-03-07 | 2019-05-23 | グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． | Semiconductor on insulator structure including low temperature flowable oxide layer and method of manufacturing the same |
-
1989
- 1989-10-24 JP JP27490889A patent/JPH03138935A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100292403B1 (en) * | 1997-12-30 | 2001-07-12 | 윤종용 | Interlayer dielectric film of semiconductor device and method for forming film |
| JP2019513294A (en) * | 2016-03-07 | 2019-05-23 | グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． | Semiconductor on insulator structure including low temperature flowable oxide layer and method of manufacturing the same |
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