JPH0265256A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To restrain the over-etching of a silicon nitride and to enable the flattening of it by a method wherein a coating film whose etching rate is nearly equal to that of a silicon nitride film is formed on the silicon nitride film, which is etched back. CONSTITUTION:An aluminum wiring 3 is formed into a required pattern on an insulating film 2, a silicon oxide film 4 is grown, and furthermore a silicon nitride film 5 is grown thereon. Next, an organic siloxane polymer solution is applied onto the whole face, which is calcined for the formation of an organic siloxane polymer layer 6. Then, the whole face is etched back through a reactive ion etching. In this process, the ratios of the etching rate of organic siloxane polymer to that of the silicon nitride and to that of a silicon oxide film are 1:1 and 2:1 respectively. The silicon nitride 5 on a wiring 3a is thoroughly removed but the silicon nitride formed on a wiring 3b is left unremoved. Lastly, a silicon oxide film 7 is formed on the whole face through a CVD method to form an interlaminar insulating film.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a glabella insulating film to planarize it.

[Conventional technology]

In recent years, with the miniaturization and multilayering of wiring in semiconductor devices, flattening between wiring layers has become important. The coating method, which is one of the planarization methods, involves growing an oxide film (CVD oxide film) on metal wiring using a vapor phase growth method, and then using silicate glass (silica film) or organic siloxane, which is formed by coating and baking. A polymer is formed, and a CVD oxide film is further grown on the polymer to form a wiring interlayer film.

In this method, as the thickness of the coating film increases, the exposed area of the coating film at the through-hole opening increases, and when sputtering aluminum for upper layer wiring, outgas from the coating film causes poor adhesion of aluminum. To avoid this, there is a method of etching back the entire surface to remove the coating film at the opening of the through hole.

That is, as shown in FIG. 3(a), a silicon oxide film 4 is grown as an interlayer insulating film on an aluminum wiring 3 formed on an insulating film 2 of a semiconductor substrate 1, and an organic siloxane polymer 6 is grown on it. Coating.

Formed by firing. Next, as shown in FIG. 3(b),
The entire surface is etched back to leave the organic siloxane polymer 6 only in the recesses, and a silicon oxide film 7 is further grown thereon as shown in FIG. 3(C).

[Problem to be solved by the invention]

In the above-described conventional method for manufacturing an interlayer film for a semiconductor device, since the unevenness of the lower pattern causes a difference in the thickness of the coating film on the wiring, it is necessary to perform etching back until the thickest part is removed. Furthermore, a certain degree of overetching is required in consideration of the film thickness and uniformity of etching to ensure a margin.

On the other hand, the etching rate of silica films and organic siloxane polymers is about twice as fast as that of oxide films, so in areas where the coating film is thin, that is, fine wiring areas, as shown in Figure 3 (b).
), the coating film is likely to be over-etched, which causes a problem in that the flatness deteriorates.

In this case, if a silicon nitride film is used as the interlayer insulating film, the etching rate ratio can be made approximately 1:1, but if the silicon nitride film is grown on aluminum, it will be susceptible to stress migration, and due to its high dielectric constant, it will have a capacitance between the eyebrows. becomes higher.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that can solve the above-mentioned problems and form a glabellar insulating film with excellent flatness.

[Means to solve the problem]

A method for manufacturing a semiconductor device according to the present invention includes a step of forming a silicon oxide film on a metal wiring layer formed on a substrate, a step of forming a silicon nitride film on the silicon oxide film,
A step of forming a coating film on the silicon nitride film with approximately the same etching rate as the silicon nitride film to flatten the surface, and at least until the thickness of the silicon nitride film on the metal wiring layer is reduced. The method includes a step of etching back the coating film, and a step of forming a silicon oxide film on the entire surface to complete a glabellar insulating film.

[Effect]

In the above-described manufacturing method, when the coating film is etched back, the silicon nitride film having the same etching rate as the coating film is etched at the same time, so over-etching of the coating film in the recessed portions is suppressed and planarization is achieved.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIGS. 1(a) to 1(d) are longitudinal sectional views showing an embodiment of the present invention in the order of steps.

First, as shown in FIG. 1(a), the insulating film 2 of the semiconductor substrate 1 is
An aluminum wiring 3 having a thickness of 1.0 μm is formed thereon in a desired pattern. Then, 2,000 silicon oxide films 4 were grown on the entire surface using the plasma CVD method, and on top of this, 2,000 silicon nitride films 5 were grown using the plasma CVD method.
People grow.

Next, as shown in FIG. 1(b), an organic siloxane polymer solution is applied to the entire surface and fired to form an organic siloxane polymer layer 6. At this time, due to the pattern dependence of the coating film thickness, the number of people is 1,000 on the fine wiring 3a, and 2,500 on the wide wiring 3b.

Next, as shown in FIG. 1(c), the entire surface is etched and hacked using, for example, CF4 or active ion etching. At this time, the etching rate ratios of the organic siloxane polymer, silicon nitride film, and silicon oxide film are 1:1 and 2:1, respectively. Etching back amount to 35
00 people, the silicon nitride film 5 on the wiring 3a is completely removed, but the silicon nitride film 5 on the wiring 3b is removed by 100 people.
Approximately 0 people will remain.

Finally, as shown in Figure 1(d), plasma CVD is applied to the entire surface.
An interlayer insulating film is formed by growing 5,000 silicon oxide films 7 using the method.

According to this method, by forming the silicon nitride film 5 having the same etching rate as the organic siloxane polymer layer 6, the organic siloxane polymer layer is coated on the wirings 3a and 3b in this region. A similar situation will occur. As a result, over-etching of the organic siloxane polymer layer 6 between the wirings 3a and 3b is suppressed, and planarization can be realized as a whole.

It goes without saying that a highly reliable multilayer wiring can be formed without exposing the coating layer on the side surface of the opening due to etching back.

FIG. 2 is a longitudinal sectional view for explaining another embodiment of the present invention.

In this example, the steps up to the formation of the organic siloxane polymer layer 6 are the same as in the previous example, but the etching hack amount is 4500, that is, the silicon nitride film of the wide wiring 3bj is completely removed. Etching back is performed up to the point.

Thereby, adverse effects such as stress migration and glabellar capacitance caused by the presence of the silicon nitride film 5 in the interlayer insulating film can be reduced more than in the previous embodiment. In addition, since approximately 1,500 people are over-etched in the narrow portion of the wiring 3a, the flatness is slightly inferior to that of the previous example.
Sufficient flattening can be achieved compared to the conventional method.

In the above description, plasma CVD was used to grow the silicon oxide film, but similar effects can be obtained by atmospheric pressure CVD, bias sputtering, or the like.

Moreover, the same effect can be obtained by using an inorganic silica film instead of the organic siloxane polymer or by applying it multiple times.

[Effects of the Invention] As explained below, in the present invention, a coating film is formed by forming a silicon nitride film on a silicon oxide film, and this is hacked by etching, so that the coating film in the recesses is It is possible to obtain an interlayer film with good flatness that suppresses overetching and maintains the shape after the coating film is formed. Also,
By removing the silicon nitride film on the metal wiring, defects due to stress migration will not occur (
, and the interlayer capacitance does not increase.

[Brief explanation of the drawing]

1(a) to (d) are vertical cross-sectional views showing one embodiment of the present invention in the order of manufacturing steps, FIG. 2 is a vertical cross-sectional view of a part of the process of another embodiment of the present invention, and FIG. a) to (C) are longitudinal cross-sectional views showing the conventional method in the order of steps. 1... Semiconductor substrate, 2... Insulating film, 3.3a, 3b
...Aluminum wiring, 4...Silicon oxide film, 5
・・・Silicon nitride film, 6...Organosiloxane polymer layer,

Claims (1)

[Claims] 1. The process of forming a silicon oxide film on the metal wiring layer formed on the substrate, the process of forming a silicon nitride film on this silicon oxide film, and the approximately etching rate of the silicon nitride film on this silicon nitride film. a step of forming a coating film with a uniform thickness to flatten the surface; a step of etching back the coating film until the thickness of the silicon nitride film on the metal wiring layer is at least reduced; and a step of forming a silicon oxide film on the entire surface. 1. A method of manufacturing a semiconductor device, comprising: forming an interlayer insulating film to complete an interlayer insulating film.