JPS58147900A - ランダム・アクセス・メモリの冗長システム - Google Patents

ランダム・アクセス・メモリの冗長システム

Info

Publication number
JPS58147900A
JPS58147900A JP57202203A JP20220382A JPS58147900A JP S58147900 A JPS58147900 A JP S58147900A JP 57202203 A JP57202203 A JP 57202203A JP 20220382 A JP20220382 A JP 20220382A JP S58147900 A JPS58147900 A JP S58147900A
Authority
JP
Japan
Prior art keywords
redundant
word
chip
address
redundancy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57202203A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6237478B2 (zh
Inventor
ロナルド・ダブリユ−・ネツパ−
ピ−タ−・ジエイ・ラドロウ
ジヨセフ・エイ・ペトロスキ−・ジユニア
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS58147900A publication Critical patent/JPS58147900A/ja
Publication of JPS6237478B2 publication Critical patent/JPS6237478B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP57202203A 1982-02-26 1982-11-19 ランダム・アクセス・メモリの冗長システム Granted JPS58147900A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/352,916 US4462091A (en) 1982-02-26 1982-02-26 Word group redundancy scheme
US352916 1982-02-26

Publications (2)

Publication Number Publication Date
JPS58147900A true JPS58147900A (ja) 1983-09-02
JPS6237478B2 JPS6237478B2 (zh) 1987-08-12

Family

ID=23387001

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57202203A Granted JPS58147900A (ja) 1982-02-26 1982-11-19 ランダム・アクセス・メモリの冗長システム

Country Status (4)

Country Link
US (1) US4462091A (zh)
EP (1) EP0087610B1 (zh)
JP (1) JPS58147900A (zh)
DE (1) DE3379986D1 (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59151398A (ja) * 1983-02-17 1984-08-29 Mitsubishi Electric Corp 半導体記憶装置
GB2154032B (en) * 1984-02-08 1988-04-20 Inmos Ltd A repairable memory array
US4599709A (en) * 1984-02-17 1986-07-08 At&T Bell Laboratories Byte organized static memory
US4745582A (en) * 1984-10-19 1988-05-17 Fujitsu Limited Bipolar-transistor type random access memory device having redundancy configuration
JPS6199999A (ja) * 1984-10-19 1986-05-19 Hitachi Ltd 半導体記憶装置
US4744060A (en) * 1984-10-19 1988-05-10 Fujitsu Limited Bipolar-transistor type random access memory having redundancy configuration
US4796233A (en) * 1984-10-19 1989-01-03 Fujitsu Limited Bipolar-transistor type semiconductor memory device having redundancy configuration
JPS61292296A (ja) * 1985-05-20 1986-12-23 Fujitsu Ltd 半導体記憶装置
JP2530610B2 (ja) * 1986-02-27 1996-09-04 富士通株式会社 半導体記憶装置
KR910005601B1 (ko) * 1989-05-24 1991-07-31 삼성전자주식회사 리던던트 블럭을 가지는 반도체 메모리장치
US6058052A (en) * 1997-08-21 2000-05-02 Cypress Semiconductor Corp. Redundancy scheme providing improvements in redundant circuit access time and integrated circuit layout area
US6115300A (en) * 1998-11-03 2000-09-05 Silicon Access Technology, Inc. Column redundancy based on column slices
US6724669B1 (en) * 2002-05-08 2004-04-20 Silicon Graphics, Inc. System and method for repairing a memory column

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51128235A (en) * 1975-04-30 1976-11-09 Toshiba Corp A semi-conductor integration circuit memory
JPS523764A (en) * 1975-06-27 1977-01-12 Hiroshi Shimizu Filter apparatus for cattle excrement using chaff charcoals as filter aids for filtration
JPS5384634A (en) * 1976-12-30 1978-07-26 Fujitsu Ltd Ic memory unit device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3753235A (en) * 1971-08-18 1973-08-14 Ibm Monolithic memory module redundancy scheme using prewired substrates
US4250570B1 (en) * 1976-07-15 1996-01-02 Intel Corp Redundant memory circuit
JPS5928560Y2 (ja) * 1979-11-13 1984-08-17 富士通株式会社 冗長ビットを有する記憶装置
US4346459A (en) * 1980-06-30 1982-08-24 Inmos Corporation Redundancy scheme for an MOS memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51128235A (en) * 1975-04-30 1976-11-09 Toshiba Corp A semi-conductor integration circuit memory
JPS523764A (en) * 1975-06-27 1977-01-12 Hiroshi Shimizu Filter apparatus for cattle excrement using chaff charcoals as filter aids for filtration
JPS5384634A (en) * 1976-12-30 1978-07-26 Fujitsu Ltd Ic memory unit device

Also Published As

Publication number Publication date
DE3379986D1 (en) 1989-07-06
EP0087610A2 (en) 1983-09-07
US4462091A (en) 1984-07-24
JPS6237478B2 (zh) 1987-08-12
EP0087610B1 (en) 1989-05-31
EP0087610A3 (en) 1987-02-04

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