DE3379986D1 - Random access memory arrangement with a word redundancy scheme - Google Patents
Random access memory arrangement with a word redundancy schemeInfo
- Publication number
- DE3379986D1 DE3379986D1 DE8383101060T DE3379986T DE3379986D1 DE 3379986 D1 DE3379986 D1 DE 3379986D1 DE 8383101060 T DE8383101060 T DE 8383101060T DE 3379986 T DE3379986 T DE 3379986T DE 3379986 D1 DE3379986 D1 DE 3379986D1
- Authority
- DE
- Germany
- Prior art keywords
- random access
- access memory
- memory arrangement
- redundancy scheme
- word redundancy
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/352,916 US4462091A (en) | 1982-02-26 | 1982-02-26 | Word group redundancy scheme |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3379986D1 true DE3379986D1 (en) | 1989-07-06 |
Family
ID=23387001
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383101060T Expired DE3379986D1 (en) | 1982-02-26 | 1983-02-04 | Random access memory arrangement with a word redundancy scheme |
Country Status (4)
Country | Link |
---|---|
US (1) | US4462091A (de) |
EP (1) | EP0087610B1 (de) |
JP (1) | JPS58147900A (de) |
DE (1) | DE3379986D1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59151398A (ja) * | 1983-02-17 | 1984-08-29 | Mitsubishi Electric Corp | 半導体記憶装置 |
GB2154032B (en) * | 1984-02-08 | 1988-04-20 | Inmos Ltd | A repairable memory array |
US4599709A (en) * | 1984-02-17 | 1986-07-08 | At&T Bell Laboratories | Byte organized static memory |
US4796233A (en) * | 1984-10-19 | 1989-01-03 | Fujitsu Limited | Bipolar-transistor type semiconductor memory device having redundancy configuration |
US4744060A (en) * | 1984-10-19 | 1988-05-10 | Fujitsu Limited | Bipolar-transistor type random access memory having redundancy configuration |
US4745582A (en) * | 1984-10-19 | 1988-05-17 | Fujitsu Limited | Bipolar-transistor type random access memory device having redundancy configuration |
JPS6199999A (ja) * | 1984-10-19 | 1986-05-19 | Hitachi Ltd | 半導体記憶装置 |
JPS61292296A (ja) * | 1985-05-20 | 1986-12-23 | Fujitsu Ltd | 半導体記憶装置 |
JP2530610B2 (ja) * | 1986-02-27 | 1996-09-04 | 富士通株式会社 | 半導体記憶装置 |
KR910005601B1 (ko) * | 1989-05-24 | 1991-07-31 | 삼성전자주식회사 | 리던던트 블럭을 가지는 반도체 메모리장치 |
US6058052A (en) * | 1997-08-21 | 2000-05-02 | Cypress Semiconductor Corp. | Redundancy scheme providing improvements in redundant circuit access time and integrated circuit layout area |
US6115300A (en) * | 1998-11-03 | 2000-09-05 | Silicon Access Technology, Inc. | Column redundancy based on column slices |
US6724669B1 (en) * | 2002-05-08 | 2004-04-20 | Silicon Graphics, Inc. | System and method for repairing a memory column |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3753235A (en) * | 1971-08-18 | 1973-08-14 | Ibm | Monolithic memory module redundancy scheme using prewired substrates |
JPS51128235A (en) * | 1975-04-30 | 1976-11-09 | Toshiba Corp | A semi-conductor integration circuit memory |
JPS523764A (en) * | 1975-06-27 | 1977-01-12 | Hiroshi Shimizu | Filter apparatus for cattle excrement using chaff charcoals as filter aids for filtration |
US4250570B1 (en) * | 1976-07-15 | 1996-01-02 | Intel Corp | Redundant memory circuit |
JPS5384634A (en) * | 1976-12-30 | 1978-07-26 | Fujitsu Ltd | Ic memory unit device |
JPS5928560Y2 (ja) * | 1979-11-13 | 1984-08-17 | 富士通株式会社 | 冗長ビットを有する記憶装置 |
US4346459A (en) * | 1980-06-30 | 1982-08-24 | Inmos Corporation | Redundancy scheme for an MOS memory |
-
1982
- 1982-02-26 US US06/352,916 patent/US4462091A/en not_active Expired - Lifetime
- 1982-11-19 JP JP57202203A patent/JPS58147900A/ja active Granted
-
1983
- 1983-02-04 DE DE8383101060T patent/DE3379986D1/de not_active Expired
- 1983-02-04 EP EP83101060A patent/EP0087610B1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS6237478B2 (de) | 1987-08-12 |
JPS58147900A (ja) | 1983-09-02 |
EP0087610A2 (de) | 1983-09-07 |
US4462091A (en) | 1984-07-24 |
EP0087610B1 (de) | 1989-05-31 |
EP0087610A3 (en) | 1987-02-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8339 | Ceased/non-payment of the annual fee |