JPS5814095B2 - Waveform shaping circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a waveform shaping circuit for supplying, for example, an input signal waveform to a relay in the form of a pulse.

Conventional waveform shaping circuits apply a waveform shaping signal as a comparison input to a comparator with a fixed reference voltage, and the output of the comparator changes its binary state depending on whether or not the input signal exceeds the reference voltage level. there were.

For this reason, when the input signal voltage changes over a wide range, the reference voltage of the comparator needs to be sufficiently low so as not to capture the noise level at all times.

Therefore, even if the input signal level is high, it will be compared with the low level of the comparison standard, and the distortion contained in the input signal will be
Due to noise and the like, problems such as the output phase and signal width being different from the expected ones have occurred.

This invention has been made in view of the above, and is a waveform shaping circuit that can automatically change the reference voltage according to the input signal level and reliably remove noise, distortion, etc. even when the fluctuation range of the input signal is large. The purpose is to provide

An embodiment of the present invention will be described below with reference to the drawings.

In FIG. 1, reference numeral 1 denotes an input terminal to which an input signal is supplied, and this input terminal 1 is connected to a zero potential section via a first voltage dividing circuit 2.

The first voltage dividing circuit 2 consists of resistors 2a and 2b, both resistors 2a and 2b.
, 2b is connected to the non-inverting input terminal of the operational amplifier 3.

The output terminal of the operational amplifier 3 is connected to a second voltage dividing circuit 5 via a diode 4 having the polarity shown.

The second voltage dividing circuit 5 consists of resistors 5a and sb, both resistors 5a
, 5b is connected to the diode 4 and to the inverting input terminal of the operational amplifier 3.

One ends of the resistors 5a and 5b are connected to a positive reference voltage source (Vref), and the other ends are connected to a zero potential section.

A capacitor 6 forms a peak hold circuit, one end of which is connected to the midpoint 5c, and the other end connected to the zero potential section.

T is a comparator circuit, and the inverting input terminal of this comparator circuit 7 is connected to the midpoint 5c, and the non-inverting input terminal is connected to the input terminal 1.

The output terminal of comparator circuit 7 is connected to output terminal 8 .

Next, the operation of the above embodiment will be described using FIGS. 2a to 2c.

If the voltage division value of the second voltage division circuit 5 when the input is zero is set to V1, then v1 becomes Vref-R4/Ra+R4.
becomes.

However, R1 and R2 are resistors 2a and 2b, and R3rR4 are resistors 5a and 5b.

An input signal MIN arrives at the input terminal 1 under the above conditions.

When this input signal vIN becomes a positive voltage that exceeds the voltage v2 at point 5c (1×1), which is the V1 level shown in FIG. 2a, the level of the voltage v2 rises.

Since this level rising value is applied to the capacitor 6 forming a peak hold circuit, the capacitor 6 is charged with this voltage of the input signal VIN.

After that, even if the input signal VIN becomes small, the voltage v
The level of 2 is gradually discharged and lowered in a time determined by the time constant of the capacitance of the capacitor 6 and the resistance values of the resistors 5a and sb.

The input signal VIN is set using the level of this voltage ■2 as a reference voltage.
When compared by the comparator circuit 7, a shaped waveform as shown in FIG. 2b is obtained at the output terminal 8.

Such a shaped waveform is obtained by varying the reference voltage v2 with the input signal VIN, but if this reference voltage is fixed as in the past, the input signal VIN will be distorted as shown in Figure 2C. Noise etc. are shaped and pulses P1 to P3 as shown in the figure are generated.

FIG. 3 shows another embodiment of the present invention, in which the same parts as in FIG. 1 are given the same reference numerals and their explanation will be omitted.

In FIG. 3, instead of the first voltage dividing circuit of the above embodiment,
A low-pass filter circuit 9 is interposed between the input terminal 1 and the positive input terminal of the operational amplifier 3.

Since the purpose of this low-pass filter circuit 9 is to remove high frequency components of the input signal, the cutoff frequency can be set over a wide range, but in this embodiment, it is set to about the fundamental frequency of the input signal. Describe the effect.

Assuming that the input signal VIN has a waveform as shown in FIG. 4a, the output of the low-pass filter circuit 9 is a voltage waveform 3 whose amplitude is smaller and the phase is delayed than that of the input signal VIN, as shown in FIG. 4a. Become.

However, if the voltage at the midpoint 5c is v5 and the maximum value of the positive voltage output from the bus filter circuit 9 when the input is 0 is smaller than v1, then v5=v1 as shown in FIG. 4a.

This is the effect of diode 4. The voltage division value v1 is determined by the comparator circuit 7 even when the input signal VIN is at the expected minimum.
It is set to be formattable by .

If the maximum value of the positive voltage output from the low-pass filter 9 exceeds the voltage division value v1, the diode 4 and capacitor 6 cause the capacitor to rise to a voltage that matches the peak level of the positive voltage of the voltage waveform v3 shown in FIG. 4a. 6 is charged.

Thereafter, the charging voltage of the capacitor 6 is gradually discharged at a time determined by the resistors 5a, sb and the time constant of the capacitor 6, and the voltage waveform becomes like the voltage waveform v5 shown in FIG. 4a.

This voltage waveform v5 becomes the comparison reference voltage and the comparator circuit 7
The input signal vIN is compared and shaped to have a waveform as shown in FIG. 4b.

Incidentally, FIG. 4C shows the waveform of the input signal VIN when the conventional fixed reference voltage is used to shape the waveform. In this case, it is shown that distortion, noise, etc. are also shaped as in the previous embodiment.

Furthermore, in both of the above embodiments, the case where the positive voltage part of the input signal is shaped has been described, but when shaping the negative voltage part, the reference voltage source (Vref) is set to a negative voltage, and the polarity of the diode 4 is changed. A similar effect can be obtained by using reverse polarity.

As described above, according to the present invention, a peak hold circuit is provided which extracts only the input signal larger than the divided voltage value of the reference voltage source and holds the peak value of the extracted power, and the peak hold value and the input signal are I tried to compare it with
Even when the input signal changes over a wide range, the comparison reference level can always be controlled to the optimal value, so the desired shaped waveform can be obtained without having to shape the noise or distortion contained in the input signal. This has the advantage of high reliability of circuit control.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 a''
FIG. 3 is a circuit diagram showing another embodiment of the present invention, and FIG. 4 a"c is a waveform diagram explaining the action of FIG. 3. 1... Input terminal, 2... First voltage divider circuit, 3... Operational amplifier, 4... Diode, 5... Second voltage divider circuit, 6... Capacitor, 7... Comparator circuit, 8... ...Output terminal, 9...
Low pass filter circuit.

Claims (1)

[Claims] 1 A first voltage divider circuit that divides the human power signal, a second voltage divider circuit that divides the reference voltage, and the voltage division point of the first voltage divider circuit is connected to one input terminal, and the other inverting input terminal is connected to the voltage divider circuit that divides the reference voltage. The voltage dividing point of the second voltage dividing circuit is connected, and the output terminal is connected to the voltage dividing point of the second voltage dividing circuit via a diode, and only input signals larger than the voltage dividing value of the second voltage dividing circuit are connected. an operational amplifier that outputs only when 1. A waveform shaping circuit comprising: a comparison circuit that performs comparison and sends a shaped output as an output.