JPH0114729B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improved monostable multivibrator.

Conventionally, this type of apparatus has been constructed as shown in FIG. In Figure 1, transistors 1 and 2 and resistor 3 constitute a NOR gate, and transistors 4 and 5 and resistor 6 constitute a NOR gate.
Configure NOR gate. Resistors 7, 8, 9 are
This is to limit the current. Transistors 10, 11, 12 and resistors 13, 14 constitute a switching circuit, and resistor 15 and capacitor 16 constitute a time constant circuit. Transistors 17 and 18 and resistors 19 and 20 constitute a differential amplifier, and resistors 21 and 2 serve as a reference voltage source that outputs a reference voltage to be applied to the differential amplifier.
Consisting of 2. Transistor 23 and resistors 24 and 25 constitute a detection circuit that detects the output of the differential amplifier.

The operation of the conventional example configured in this way will be explained. First, the operation when the time constant of the time constant circuit is selected so that the pulse time width t _OUT of the output delay pulse output from the output terminal E is shorter than the pulse time width t _IN of the input pulse applied to the input terminal A. will be explained using FIGS. 1 and 2. Second
A to E in the figure show voltage waveforms at points A to E shown in FIG. 1. First, the input signal applied to input terminal A is at a high level (hereinafter referred to as H).
When the output terminal reaches the high level (hereinafter referred to as L level), transistor 2 is turned on and its collector becomes low level (hereinafter referred to as L level), so transistor 5 is turned off and the output terminal E becomes H level. Furthermore, when the transistor 2 is turned on, the transistor 10 is turned off, the transistor 11 is turned on, and the transistor 12 is turned off.
The capacitor 16 is charged via the capacitor 16. If the input signal remains at H level, the voltage of the capacitor 16 rises to the voltage of the DC voltage source (hereinafter referred to as V _CC ). Next, as shown in FIG. 2A, when the input signal changes from H level to L level, transistor 2 turns off, transistor 10 turns on, transistor 11 turns off, and transistor 12 turns on. , the discharge current of the capacitor 16 flows through the collector of the transistor 12. Therefore, the voltage at the connection point C between the resistor 15 and the capacitor 16 becomes as shown in FIG. 2C. Here, in the process of charging the capacitor 16, the reference voltage V _B (V _B is the resistance value of the resistors 21 and 22 as R ₂₁ and R ₂₂ ) is applied to the base of the transistor 18.
V _B =V _CC ·R ₂₂ /R ₂₁ +R ₂₂ ), when the voltage of the capacitor 16 applied to the base of the transistor 17 becomes high, the transistor 17 becomes conductive and the transistor 18 becomes non-conductive. When the transistor 17 becomes conductive, the voltage at the collector of the transistor 17 decreases, so the transistor 23 turns on and the transistor 4 becomes conductive. Therefore, the output signal becomes L level. That is, the voltage at point D in FIG. 1 is ta when the voltage at point C in FIG. 1 reaches the reference voltage V _B while the capacitor 16 is being charged.
The pulse waveform rises at 1 and falls when the level of the input terminal A falls from the H level to the L level, resulting in a pulse waveform having the time width t ₁ shown in FIG. 2D.
In addition, the voltage at the output terminal E becomes V _CC only when the signals applied to the bases of transistors 4 and 5 both go to L level.
As shown in FIG. 2E, the waveform of the signal output from the input terminal A rises when the voltage at the input terminal A rises, and falls when the voltage at the D point reaches the H level. Here, the pulse time width t _OUT of the output delay pulse output from the output terminal E is t _OUT = t _IN −t ₁ , and if the values of the resistor 15 and capacitor 16 are R ₁₅ and C ₁₆ , respectively, t _OUT = R ₁₅・C ₁₆ ln
V _CC /V _CC −V _B.

Next, using Figures 1 and 3, we will explain the operation when the time constant of the time constant circuit is selected so that the pulse time width t _OUT of the output delayed pulse is longer than the pulse time width t _IN of the input pulse. do. A to E in FIG. 3 show voltage waveforms at points A to E shown in FIG. 1. First, when the input signal applied to input terminal A becomes H level, transistor 2 becomes conductive and the voltage at point B becomes L level, so transistor 10 is off, transistor 11 is on, and transistor 12 is on. Turns off. Since transistor 12 is turned off, capacitor 16 is charged via resistor 15 by the DC voltage source. and capacitor 16
When the voltage of becomes the reference voltage V _B , transistor 1
7 becomes conductive, and transistor 18 becomes non-conductive.
When transistor 17 becomes conductive, transistor 2
3 becomes conductive and transistor 4 turns on. When transistor 4 is turned on, the voltages at the collectors of transistors 4 and 5 go to L level, and transistor 1 is turned off. Therefore, as shown in FIGS. 3B and 3E, the waveforms B and E have a phase difference of 180°. In this way, the waveform of the signal output from output terminal E is as shown in FIG.
As shown in , when the voltage at input terminal A rises, the voltage at capacitor 16 becomes the reference voltage.
Since it falls when it reaches V _B , the pulse time width t _OUT of the output delay pulse is the pulse time width of the input pulse.
Can be longer than t _IN . Here, the pulse time width t _OUT of the output delay pulse output from the output terminal E becomes t _OUT =R ₁₅ ·C ₁₆ lnV _CC /V _CC −V _B. However, the conventional example described above has a complicated structure and has a large number of circuit parts, resulting in high production costs and difficulty in integration.

In order to eliminate the drawbacks of the above-mentioned conventional examples, the present invention provides a monostable multivibrator that has a simple structure and a reduced number of parts, thereby reducing production costs and facilitating integration. The present invention will be explained below with reference to the drawings.

Figure 4 shows the basic configuration of the present invention.
NOR with 1 input terminal and 1 output terminal
An input signal is applied to the first input terminal of the gate 26, and the output terminal of the NOR gate 26 is connected to the switching circuits 27 and 28. Then, the output terminal of the switching circuit 27 is connected to a time constant circuit which is composed of a resistor 29 and a capacitor 30 and sets the pulse time width of the output delay pulse to control charging and discharging. Further, the output terminal of the switching circuit 28 is connected to a reference voltage source composed of resistors 31 and 32 to control the output voltage value. The output terminal of the reference voltage source and the output terminal of the time constant circuit are connected to a comparison circuit 33. Further, the output terminal of the comparison circuit 33 is connected to the detection circuit 34, and the output terminal of the comparison circuit 33 is connected to the detection circuit 34.
The output terminal of the monostable multivibrator 34 is made the output terminal of the monostable multivibrator 34, and the second
Connect to the input terminal of The basic configuration of the present invention has been shown above, and next, one embodiment of the present invention is shown in FIG.

In FIG. 5, transistors 35 and 36 and resistor 37 constitute a NOR gate, and transistors 38 and 39 constitute a switching circuit, respectively. The resistor 29 and the capacitor 30 constitute a time constant circuit, and the resistors 31 and 32 constitute a reference voltage source. Also, transistors 40, 41, 4
2, 43, and resistor 44 constitute a differential amplifier with an active load, which is used as a comparison circuit. The transistor 45 and resistor 46 constitute a detection circuit. Note that the resistor 47 is a resistor for limiting current.

The operation of this embodiment configured as above will be explained. F to K in Figures 6 and 7
5 shows the voltage waveform at points F to K shown in FIG.

First, the time constant of the time constant circuit is selected so that the pulse time width t _OUT of the output delay pulse output from the output terminal K is shorter than the pulse time width t _IN of the input pulse applied to the input terminal F. The operation will be explained using FIGS. 5 and 6. First, when the input signal applied to the input terminal F becomes H level, the transistor 35 becomes conductive and the collector of the transistor 35 becomes L level. Therefore, transistors 38 and 39 are each turned off.
Since transistor 38 is off, capacitor 30 is charged through resistor 29 by a DC voltage source (not shown). If the input signal remains at the H level, the voltage of the capacitor 30 rises to the voltage of the DC voltage source (hereinafter referred to as V _CC ).
Further, since the transistor 39 is in the off state, the voltage at the base of the transistor 41 is
The reference voltage of the reference voltage source composed of 32 (hereinafter referred to as
V _B ). Here V _B is resistor 31,3
If the resistance values of 2 are R ₃₁ and R ₃₂ respectively, then V _B =
V _CC・R ₃₂ /R ₃₁ +R ₃₂ . Next, as shown in FIG. 6F, when the input signal changes from the H level to the L level, the transistor 35 becomes non-conductive and the transistors 38 and 39 become on. When the transistor 38 becomes conductive, the discharge current of the capacitor 30 flows through the collector of the transistor 38. Therefore, the voltage waveform at the connection point H between the resistor 29 and the capacitor 30 has a waveform as shown in FIG. 6H.
When the transistor 39 becomes conductive, the level of the collector of the transistor 39 becomes L level, so the voltage at the connection point I between the resistors 31 and 32 is as shown in FIG.
As shown in , only during the period when the input signal is at H level.
Becomes V _B. Here, during the period from the time t _p when the input signal becomes H level to the time t _a when the voltage of the capacitor 30 becomes V _B , the base voltage of the transistor 41 is higher than the base voltage of the transistor 40. Transistor 40 is turned off, and transistor 41 is turned on. While the transistor 41 is in the on state, the collector of the transistor 41 is at the L level and the transistor 45 is in the on state. Furthermore, when the input signal goes to L level and points H and I in FIG. . Therefore, the voltages at point J and output terminal K in FIG. 5 are as shown by J and K in FIG. 6. Although an active load constituted by transistors 42 and 43 is used here as the collector load of transistors 40 and 41, it may be an ordinary resistor. Therefore, the pulse time width t _OUT of the output delay pulse output from the output terminal K becomes t _OUT = t _a −t _p , and if the respective values of the resistor 29 and capacitor 30 are R ₂₉ and C ₃₀ , t _OUT = R ₂₉・C ₃₀ ln
V _CC /V _CC −V _B.

Next, the operation when the time constant of the time constant circuit is selected so that the pulse time width t _OUT of the output delayed pulse is longer than the pulse time width t _IN of the input pulse will be explained using Figures 5 and 7. . First, when the input signal applied to the input terminal F becomes H level, the transistor 35 becomes conductive, and the voltage at point G in FIG. 5 becomes L level as shown in FIG. 7G. Transistors 38 and 39 are then turned off. Since the transistor 38 is turned off, charging of the transistor 30 from the DC voltage source via the resistor 29 is started. Also, since the transistor 39 is turned off, the base voltage of the transistor 41 is
It becomes V _B. Here, the time constant of the time constant circuit is selected so that the pulse time width t _OUT of the output delay pulse is longer than the pulse time width t _IN of the input pulse, so during the period when the input signal is at H level, the transistor 41 is The base voltage is higher than the base voltage of the transistor 40, so that the transistor 40 is in an off state and the transistor 41 is in an on state.
Since the transistor 41 is in the on state, the voltage at point J in FIG. 5 is at the L level, the transistor 45 is in the on state, and the voltage at the output terminal K is at the H level. Next, when the input signal falls from the H level to the L level, the transistor 35
becomes non-conductive, but since the base voltage of the transistor 36 is at H level, the voltage at point J in FIG.
It remains at the L level as shown in FIG. 7J. Then, when the voltage of the capacitor 30 reaches _VB as shown in FIG. 7H, the transistor 40 becomes conductive.
Transistor 41 becomes non-conductive. When the transistor 41 becomes non-conductive, the transistor 45 becomes non-conductive, so that the voltage at the output terminal K becomes L level. Therefore, the time width of the signal output from the output terminal K is larger than the time width of the _{input pulse} , as shown in _FIG . ₃₀ lnV _CC /V _CC −V _B.

As explained above, according to the present invention, compared to conventional monostable multivibrators, there is no need to use a flip-flop and it is only necessary to switch the reference voltage source of the comparator circuit, which simplifies the configuration and reduces the number of components. Since it is possible to reduce
It has advantages not found in conventional methods in that production costs are low and integration is easy.

[Brief explanation of drawings]

Figure 1 is a circuit diagram of a conventional monostable multivibrator, and Figures 2 and 3 are A to E in Figure 1.
FIG. 4 is a diagram showing the basic configuration of the present invention, FIG. 5 is a circuit diagram showing an embodiment of the present invention, and FIGS. 6 and 7 are the same as those in FIG. FIG. 3 is a diagram showing voltage waveforms at points F to K. 26...NOR gate, 27, 28...Switching circuit, 29, 31, 32...Resistor, 30
... Capacitor, 33 ... Comparison circuit, 34 ... Detection circuit.

Claims (1)

[Claims] 1 an input signal is applied to the first input terminal
a NOR gate; a time constant circuit that turns on the first switching circuit and discharges the first switching circuit to a low level when the output of the NOR gate is at a high level; and a time constant circuit that charges the first switching circuit to a high level when the output of the NOR gate is a low level; When the output of the gate is high level, the second switching circuit is turned on and outputs low level, and when the output of the NOR gate is low level, the reference voltage source outputs the reference voltage, and the output voltage of the time constant circuit and this It consists of a comparison circuit that compares the output voltage of the reference voltage source and a detection circuit that detects the output of the comparison circuit, and the output of the detection circuit is
A monostable multivibrator, characterized in that an output signal is applied to a second input terminal of a NOR gate and an output signal is obtained from an output terminal of the detection circuit.