JPS58131748A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法Info
- Publication number
- JPS58131748A JPS58131748A JP57013004A JP1300482A JPS58131748A JP S58131748 A JPS58131748 A JP S58131748A JP 57013004 A JP57013004 A JP 57013004A JP 1300482 A JP1300482 A JP 1300482A JP S58131748 A JPS58131748 A JP S58131748A
- Authority
- JP
- Japan
- Prior art keywords
- region
- substrate
- layer
- ion
- implanted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H10W10/011—
-
- H10W10/10—
Landscapes
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57013004A JPS58131748A (ja) | 1982-01-29 | 1982-01-29 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57013004A JPS58131748A (ja) | 1982-01-29 | 1982-01-29 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58131748A true JPS58131748A (ja) | 1983-08-05 |
| JPH0249019B2 JPH0249019B2 (enExample) | 1990-10-26 |
Family
ID=11821026
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57013004A Granted JPS58131748A (ja) | 1982-01-29 | 1982-01-29 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58131748A (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5010034A (en) * | 1989-03-07 | 1991-04-23 | National Semiconductor Corporation | CMOS and bipolar fabrication process using selective epitaxial growth scalable to below 0.5 micron |
| EP0933801A1 (fr) * | 1998-01-30 | 1999-08-04 | STMicroelectronics S.A. | Procédé de dépÔt d'une région de silicium monocristallin |
| US6143073A (en) * | 1998-11-19 | 2000-11-07 | Heraeus Shin-Etsu America | Methods and apparatus for minimizing white point defects in quartz glass crucibles |
| US6461946B2 (en) | 2000-05-01 | 2002-10-08 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing semiconductor device |
-
1982
- 1982-01-29 JP JP57013004A patent/JPS58131748A/ja active Granted
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5010034A (en) * | 1989-03-07 | 1991-04-23 | National Semiconductor Corporation | CMOS and bipolar fabrication process using selective epitaxial growth scalable to below 0.5 micron |
| EP0933801A1 (fr) * | 1998-01-30 | 1999-08-04 | STMicroelectronics S.A. | Procédé de dépÔt d'une région de silicium monocristallin |
| FR2774509A1 (fr) * | 1998-01-30 | 1999-08-06 | Sgs Thomson Microelectronics | Procede de depot d'une region de silicium monocristallin |
| JPH11274171A (ja) * | 1998-01-30 | 1999-10-08 | St Microelectronics Sa | 単結晶シリコン領域の堆積法 |
| US6165265A (en) * | 1998-01-30 | 2000-12-26 | Stmicroelectronics S.A. | Method of deposition of a single-crystal silicon region |
| US6143073A (en) * | 1998-11-19 | 2000-11-07 | Heraeus Shin-Etsu America | Methods and apparatus for minimizing white point defects in quartz glass crucibles |
| US6461946B2 (en) | 2000-05-01 | 2002-10-08 | Mitsubishi Denki Kabushiki Kaisha | Method of manufacturing semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0249019B2 (enExample) | 1990-10-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4749441A (en) | Semiconductor mushroom structure fabrication | |
| US6448129B1 (en) | Applying epitaxial silicon in disposable spacer flow | |
| JPH05198543A (ja) | 半導体基板の製造方法および半導体基板 | |
| US5391903A (en) | Selective recrystallization to reduce P-channel transistor leakage in silicon-on-sapphire CMOS radiation hardened integrated circuits | |
| US5106768A (en) | Method for the manufacture of CMOS FET by P+ maskless technique | |
| JPH0348656B2 (enExample) | ||
| JPS58131748A (ja) | 半導体装置の製造方法 | |
| JPS62104051A (ja) | 集積回路のアイソレ−シヨン構造およびその形成方法 | |
| JPH0582441A (ja) | 炭化シリコンバイポーラ半導体装置およびその製造方法 | |
| JPS58200554A (ja) | 半導体装置の製造方法 | |
| JPS5984435A (ja) | 半導体集積回路及びその製造方法 | |
| US5556793A (en) | Method of making a structure for top surface gettering of metallic impurities | |
| JPH0113210B2 (enExample) | ||
| JP3446378B2 (ja) | 絶縁ゲート型電界効果トランジスタの製造方法 | |
| JPH0533527B2 (enExample) | ||
| JPH02187035A (ja) | 半導体装置の製造方法 | |
| KR100223795B1 (ko) | 반도체소자제조방법 | |
| JPH02309646A (ja) | 半導体装置の製造方法 | |
| JPH0464182B2 (enExample) | ||
| JPS6025272A (ja) | 絶縁ゲ−ト電界効果型トランジスタ | |
| JPS59105367A (ja) | Mos型トランジスタの製造方法 | |
| JPH0428246A (ja) | 半導体装置およびその製造方法 | |
| JPS63144567A (ja) | 半導体装置の製造方法 | |
| JPS5839062A (ja) | 半導体装置とその製造方法 | |
| JPS60752A (ja) | 半導体装置の製造方法 |