JPS58118152A - Polycrystalline si thin film transistor - Google Patents

Abstract

PURPOSE:To provide a thin film FET with large OFF resistance on a low cost glass substrate at a low temperature, by forming P-N junctions at a source.drain electrode part without using a thermal diffusion or an ion implantation, etc. CONSTITUTION:On the glass plate 1 at a low cost and with low heat resisting temperature, a P type poly, Si film 2 is formed. An SiO2 mask 7 is applied, thus an Sb film 8 is evaporated, and the mask 7 is removed resulting in the formation of an Sb source electrode 4 and drain electrode 5. Thereat, PN junctions 2a and 2b are formed. Next, an oxidation treated film 2c is formed on the P type poly Si film 2 and covered with an Al2O3 film 3, and accordingly an Al gate electrode 6 is provided. By this constitution, a thin film FET with large OFF resistance and ON-OFF ratio, and a stable characteristic can be formed without using the thermal diffsuion, ion implantation, etc. for P-N junction formation.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a polycrystalline silicon thin film transistor, particularly a thin film transistor using P-type polycrystalline silicon.

A thin layer transistor is a semiconductor thin film formed by depositing a semiconductor thin film on an insulating substrate by vapor deposition or the like.
The exit is a field effect type 69, and both structure and operation are MOS.
- Similar to FET. However, MOS-FET
The thin film transistor is formed using a federated single crystal X-plate, whereas the thin film transistor is constructed from a semiconductor thin film formed on an insulating substrate, so it has the advantage that a large area transistor array can be manufactured. For this reason, for example,
It is extremely suitable as a switching element for preventing crosstalk in liquid crystal matrix displays. In other words, in recent years, liquid crystal matrix displays have been used as devices for pocket televisions and computer terminals, and hUi has been promoted, and there is a need for further definition of iii images, or in order to prevent crosstalk due to the increase in the number of pixels. It is effective to attach a switching element to each pixel. This interval,
Advantageously, thin film transistors can be formed on one substrate of the display panel. Also in this case,
As the semiconductor constituting the thin film, Cd8. Compounds such as Cd1i. and amorphous silicon can also be used, but polycrystalline silicon is the best in terms of stability of characteristics and non-polluting image points.

Figures 1 and 2 are cross-sectional views showing an example of a thin film transistor of this kind that is commonly used. In the figure, 1 is an insulator plate made of glass or the like, 2 is semiconductor steel, 3 is an insulator, 4 and 5 are source and drain electrodes, and 6
is the gate electrode.

However, in a thin film transistor having the above structure, the semiconductor I! If 2 is polycrystalline silicon, if the film thickness is too thin, the crystallinity will be insufficient and good operating characteristics will not be obtained.In order to obtain good operating characteristics, the film thickness needs to be about 2000 A or more, preferably about 5000 A or more. It is. However, if the film thickness of the semiconductor 112 is increased in this way,
In the case of the structure shown in the figure, even if a voltage was applied to the gate, carriers were not sufficiently excited in the semiconductor 1112 near the source electrode 4 and the drain electrode @S, making it difficult to operate. Therefore, when polycrystalline silicon is used as the semiconductor steel 2, FIG. 3 is advantageous in terms of carrier excitation.

The structure shown in Figure 4 is considered to be in seventh place. In addition, Figure 3,
In FIG. 4, the same parts as in FIGS. 1 and 2 are designated by the same reference numerals. In the structure shown in FIG. 3, after forming the source electrode 4 and drain electrode 5, the polycrystalline silicon semiconductor U2? i: However, in order to form polycrystalline silicon WA, the temperature of one plate is approximately 500℃.
℃ or higher, the electrode material diffuses into the silicon or reacts with the silicon at the time of forming the silicon film, so there is a drawback that it cannot be used in practice. In the end, if polycrystalline silicon is used as the semiconductor f12, the #I transparent pattern shown in FIG. 4 has no choice but to be used.

In the case of #I structure in FIG. 4, the source electrode 4. Drain electrode 5
Formation of pl can also be performed by mask vapor deposition, but there are drawbacks such as insufficient precision of the electrode pattern and leakage between the source electrode 4 and the drain electrode 5. On the other hand, in photo-etching, taking into account conditions such as easy formation of a predetermined electrode pattern and good tt contact, the Aj value is limited to 8%. In the end, it is desirable that the source i, tf4° drain electrode 5 of the polycrystalline silicon thin film transistor be formed with a pattern of photoetching At and Sb.

When such a polycrystalline silicon thin film transistor was manufactured, good characteristics were obtained. However, at the same time, it became clear that there were problems.

That is, when a thin film transistor is used as a switching element of a liquid crystal display, for example, it is desirable that the resistance K between the source and drain electrodes (hereinafter referred to as off resistance) during off-state be as large as possible. The transistors used have a certain limit, and increasing the size beyond that limit would simply require a line.

The off-resistance of a thin film transistor is determined by the resistivity of the semiconductor used, the thickness of the semiconductor, and geometric factors such as the distance between the source and drain electrodes.For example,
In the case of thin film transistors using Cd8, CaS has sufficient crystallinity even if the film is thin.
It is possible to reduce the film thickness of, for example, about 100^, and as a result of (7), it is possible to obtain a large off-resistance. On the other hand, in the case of thin film transistors using polycrystalline silicon,
If the polycrystalline silicon film is thin, the crystallinity is insufficient and good operating characteristics cannot be obtained.In order to obtain good operating characteristics, the thickness must be approximately 2000 A or more, preferably approximately 5000 A or more, and the film thickness must be increased. In practice, it is not possible to increase the off-resistance by making it thinner.

In addition, if the distance between the source and drain electrodes is increased, the off-resistance will increase in proportion to it, but at the same time, the on-state resistance will also increase, which is not negative, and furthermore, the response speed will become slower. Another O problem comes up. In the end, it was determined that in order to increase the off-resistance of the polycrystalline silicon thin film transistor I without causing any adverse effects on others, it was necessary to adopt a method other than those described above.

By the way, in the case of MOI-FIST using single crystal silicon, it is possible to obtain an off-resistance value that is sufficiently satisfactory for practical use. This is a p-
This is because when an n-junction is formed, one of them is reverse biased in the off state, and only a very small current flows. Therefore, in a polycrystalline silicon thin film transistor, it is expected that a large off-resistance can be obtained by forming p-st junctions in the source and drain electrode portions.

The p-n junction of a single-crystal silicon Mo1-FET is p
Alternatively, it may be formed on an n-type silicon substrate by dissolving an element that makes silicon into n- or p-type (silicon) solid solution in silicon by thermal diffusion or ion implantation.

However, when forming a p-n junction by thermal diffusion, a high temperature of approximately 1000°C is required, and when forming a p-n junction by ion implantation, it is necessary to recover the silicon damage caused by implantation. Hit him with 10
11hI close to 00℃! Because there is a panoramic view of the annealing process,
If we try to apply this to polycrystalline silicon thin film transistors, we will use materials such as quartz or alumina, which have high heat resistance, for the substrate, and this will not be a problem. Features will be lost. Therefore, it is desired that the entire p-bond junction be formed at a low temperature that is lower than the heat resistance temperature of an inexpensive substrate such as glass.

Therefore, the present invention has been conceived in view of these points, and its purpose is to form a p-n junction at a low temperature below the heat-resistant temperature using a substrate with low heat resistance such as inexpensive glass. The object of the present invention is to provide a polycrystalline silicon thin film transistor with good performance. Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. 1. First, in FIG. 4, 1, a Cp type polycrystalline silicon film is used as the semiconductor film 2. In this case, the p-type polycrystalline silicon pus 2 may be added when the polycrystalline silicon steel 2 is vapor-deposited, or an element that makes silicon p-type is attached to the substrate 1 prior to vapor deposition. 1 is also good. Furthermore, sb is used as the source and drain electrodes 4 and 5. In this case, the source/drain electrode 4 on the p-type polycrystalline silicon film 2
゜The formation surface is doped with sb and becomes n-type, P-
+an junction is formed. A polycrystalline silicon thin film transistor was fabricated using the same method except that a polycrystalline silicon film without any additives was used as a polycrystalline silicon comparison, and the heat treatment temperature after completion was changed to about 350C. When the off-resistances of the two were compared, the former's value was more than three times that of the latter's off-resistance. Note that the off-resistance of the polycrystalline silicon transistor with the structure shown in FIG. W
It can be completely suppressed by exposing the surface of polycrystalline silicon to a 1R acid treatment for 93 times, and oxygen plasma treatment on the surface of polycrystalline silicon is extremely effective in stabilizing the biological It is. Furthermore, when this polycrystalline silicon film 2 is treated in hydrogen plasma to form a hydrogen plasma-treated film, the off-resistance is improved by about 50% compared to that not treated in hydrogen plasma. It also improved the mutual contactance, which was effective in improving the performance of polycrystalline silicon thin film transistors. However, one type of polycrystalline silicon thin film transistor with a hydrogen plasma treatment that lowers its off-resistance was introduced.

Next, a method for forming a multi-silicon thin transistor according to the present invention will be summarized with reference to FIG. First, as shown in a)
After forming p-type polycrystalline silicon gA2, VcS1021iiiI is deposited on p-type polycrystalline silicon 1112 and etched into a predetermined shape, and a mask T for Sb evaporation 911 for source and drain supplementary formation, which will be described later, is formed. Form.

Next, as shown in the same figure), this p-type polycrystalline silicon stud 2
After vaporizing sb on top and forming sb vapor deposition 1!18,
102 mask T as well as the Sb evaporator ゛Fi48 on the upper surface.
As shown in the same figure (C), a source electrode 4. made of SB steamed 8-layers is formed on the p-type polycrystalline silicon #2. A drain electrode 5 is formed. In this case, 5in2
The upper surface of the p-type polycrystalline silicon layer 2, on which the mask 7 was not formed, is doped with psb by evaporation of sb and becomes n-type, forming a P-nM combination/d2a*2-.

Next, the source and train electrodes 4 and 5 are formed at 7'C.
The surface of the P-type polycrystalline silicon IA2 is subjected to a #multiple plasma treatment to form an oxidized film 2ek. Next, as shown in FIG.
At2 is applied to the upper surface where the drain and source electrodes 4 and 5 are formed.
By forming the insulator 8113 made of 03 and further forming the gate N pole 6 made of ^l on this insulating film 3 by vapor deposition or sputtering, both the off resistance and the on/off ratio are large. A thin film transistor with stable electrical characteristics was formed.

As explained above, according to the present invention, it is possible to form a p-n junction at the source and drain [mff1l] without using methods such as thermal diffusion or ion implantation to form a P-E1 junction such as in MOS-FIT. This makes it possible to manufacture thin film transistors with high off-resistance at low temperatures by using inexpensive glass substrates with low heat resistance, and is extremely advantageous in that switching elements for large-area flat displays can be provided at low prices. You can get the same effect.

[Brief explanation of the drawing]

Figures 1 to 3 are cross-sectional views of a polycrystalline silicon thin film transistor according to the prior art, and Figure 4 is a cross-sectional view of an asterisk for explaining an example of a polycrystalline silicon transistor according to the present invention.
FIGS. 5(aJ to d) are main part cross-sectional diagrams showing an example of the escape method of a polycrystalline silicon transistor according to the present invention. 1°0: irresistible substrate, 2: semiconductor Film (polycrystalline silicon 1ilI), l@, lbmm*ap-B junction/&
, 2 e... Oxidation treatment L 3... Insulating film, 4
・0... Source electrode, 5... Drain N pole, 6...
...Kate electrode, T...Mask, 8...SB vapor deposition result. Agent Patent Attorney Susuki 88 AU Rate Figure 3 Figure 4, 6 Figure 5

Claims (1)

[Claims] 1. In a polycrystalline silicon thin film transistor in which polycrystalline silicon film and at least source and drain electrodes are formed on an insulating plate, the polycrystalline silicon film is free from p-type polycrystalline silicon film and 11] A polycrystalline silicon thin film transistor characterized in that the source and drain electrodes are made of Bb or an Sb alloy. 2 Thin ll! on the surface of the polycrystalline silicon twill! A polycrystalline silicon thin film transistor according to item 1 of claim 1, characterized in that an oxygen plasma oxidation treatment is provided. The polycrystalline silicon thin film transistor according to claim 1JJ, characterized in that a thin hydrogen plasma treated film is provided on the surface of the polycrystalline silicon film.