JPS58115956A - デ−タ受信方式 - Google Patents

デ−タ受信方式

Info

Publication number
JPS58115956A
JPS58115956A JP21503181A JP21503181A JPS58115956A JP S58115956 A JPS58115956 A JP S58115956A JP 21503181 A JP21503181 A JP 21503181A JP 21503181 A JP21503181 A JP 21503181A JP S58115956 A JPS58115956 A JP S58115956A
Authority
JP
Japan
Prior art keywords
data
data signal
signal
parity
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21503181A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0312502B2 (enrdf_load_stackoverflow
Inventor
Kiyoshi Mochizuki
望月　清
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Azbil Corp
Original Assignee
Azbil Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Azbil Corp filed Critical Azbil Corp
Priority to JP21503181A priority Critical patent/JPS58115956A/ja
Publication of JPS58115956A publication Critical patent/JPS58115956A/ja
Publication of JPH0312502B2 publication Critical patent/JPH0312502B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045—Arrangements at the receiver end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes
    • H04L1/0063—Single parity check

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
JP21503181A 1981-12-28 1981-12-28 デ−タ受信方式 Granted JPS58115956A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21503181A JPS58115956A (ja) 1981-12-28 1981-12-28 デ−タ受信方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21503181A JPS58115956A (ja) 1981-12-28 1981-12-28 デ−タ受信方式

Publications (2)

Publication Number Publication Date
JPS58115956A true JPS58115956A (ja) 1983-07-09
JPH0312502B2 JPH0312502B2 (enrdf_load_stackoverflow) 1991-02-20

Family

ID=16665598

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21503181A Granted JPS58115956A (ja) 1981-12-28 1981-12-28 デ−タ受信方式

Country Status (1)

Country Link
JP (1) JPS58115956A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5583810A (en) * 1991-01-31 1996-12-10 Interuniversitair Micro-Elektronica Centrum Vzw Method for programming a semiconductor memory device
US6243293B1 (en) 1992-01-29 2001-06-05 Interuniversitair Micro-Elektronica Centrum Contacted cell array configuration for erasable and programmable semiconductor memories

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101608A (en) * 1978-01-27 1979-08-10 Toshiba Corp Message transmission system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54101608A (en) * 1978-01-27 1979-08-10 Toshiba Corp Message transmission system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5583810A (en) * 1991-01-31 1996-12-10 Interuniversitair Micro-Elektronica Centrum Vzw Method for programming a semiconductor memory device
US5583811A (en) * 1991-01-31 1996-12-10 Interuniversitair Micro-Elektronica Centrum Vzw Transistor structure for erasable and programmable semiconductor memory devices
US6243293B1 (en) 1992-01-29 2001-06-05 Interuniversitair Micro-Elektronica Centrum Contacted cell array configuration for erasable and programmable semiconductor memories

Also Published As

Publication number Publication date
JPH0312502B2 (enrdf_load_stackoverflow) 1991-02-20

Similar Documents

Publication Publication Date Title
JPS5750307A (en) Time base correcting device
KR950016014A (ko) 광폭의 데이터전송장치에 있어서 에러검출 및 정정회로
GB2037542A (en) Synchronising binary sequences;error prevention
JPS58115956A (ja) デ−タ受信方式
GB844308A (en) Data transfer apparatus
JP2806856B2 (ja) 誤り検出訂正回路の診断装置
JP2644112B2 (ja) Ｆｉｆｏ試験診断回路
JPS5811769B2 (ja) 周期パルスチエツク方式
JPH0322060A (ja) メモリエラー検出制御方式
SU1647572A1 (ru) Устройство дл контрол последовательного кода
SU670958A2 (ru) Устройство дл обработки телеизмерительной информации
SU1236559A1 (ru) Запоминающее устройство с исправлением ошибок
SU1730630A2 (ru) Устройство дл сопр жени источника и приемника информации
SU1531174A1 (ru) Запоминающее устройство с коррекцией однократных ошибок
KR890003109Y1 (ko) 컴퓨터시스템의 패리티에러 검출회로
JPS6155696B2 (enrdf_load_stackoverflow)
JP2586072B2 (ja) 記憶装置
SU1550626A1 (ru) Устройство дл коррекции кодов
SU1280458A1 (ru) Буферное запоминающее устройство
EP0516437A2 (en) Write error detecting hardware arrangement
KR870003510A (ko) 메모리 접속상태 검출회로
JPH02105229A (ja) 一時記憶回路
JPS6192477A (ja) 媒体欠陥検出方式
JPS63228248A (ja) 複数誤り訂正可能主記憶装置
JPH04287253A (ja) パリティ検査回路