JPS58114220A - エツジ信号の多重処理方式 - Google Patents
エツジ信号の多重処理方式Info
- Publication number
- JPS58114220A JPS58114220A JP21315281A JP21315281A JPS58114220A JP S58114220 A JPS58114220 A JP S58114220A JP 21315281 A JP21315281 A JP 21315281A JP 21315281 A JP21315281 A JP 21315281A JP S58114220 A JPS58114220 A JP S58114220A
- Authority
- JP
- Japan
- Prior art keywords
- factor
- common line
- state
- reset
- shared line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/24—Resetting means
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21315281A JPS58114220A (ja) | 1981-12-28 | 1981-12-28 | エツジ信号の多重処理方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP21315281A JPS58114220A (ja) | 1981-12-28 | 1981-12-28 | エツジ信号の多重処理方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58114220A true JPS58114220A (ja) | 1983-07-07 |
| JPS6116108B2 JPS6116108B2 (enExample) | 1986-04-28 |
Family
ID=16634424
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP21315281A Granted JPS58114220A (ja) | 1981-12-28 | 1981-12-28 | エツジ信号の多重処理方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58114220A (enExample) |
-
1981
- 1981-12-28 JP JP21315281A patent/JPS58114220A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6116108B2 (enExample) | 1986-04-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0141075B2 (enExample) | ||
| US5313621A (en) | Programmable wait states generator for a microprocessor and computer system utilizing it | |
| JPS5454540A (en) | Data buscontrol system | |
| JPS59131255A (ja) | クロツク選択制御回路 | |
| JPS58114220A (ja) | エツジ信号の多重処理方式 | |
| JPH02166505A (ja) | 制御システムおよび処理装置 | |
| JP2600969Y2 (ja) | 中央処理装置のリセット回路 | |
| US5307500A (en) | Integrated circuit device with stand-by cancellation | |
| JPS6033654A (ja) | マイクロプロセツサ間デ−タ転送方式 | |
| SU752338A1 (ru) | Устройство дл управлени оперативной пам тью | |
| JPS553011A (en) | Error processing system for sequence control unit | |
| JPH067519Y2 (ja) | メモリ・アクセス制御装置 | |
| JPH0426914Y2 (enExample) | ||
| JP2592525B2 (ja) | 共通バスシステムの異常検出回路 | |
| JPS6051965A (ja) | バス制御方式 | |
| JPS58114384A (ja) | 記憶装置制御方式 | |
| JPH03156552A (ja) | ダイレクトメモリアクセス制御回路方式 | |
| JP2647962B2 (ja) | 表示制御装置 | |
| JPH01223521A (ja) | 大規模集積回路 | |
| JPS6320798A (ja) | リフレツシユ自動切替制御方式 | |
| JPH07129278A (ja) | マルチプロセッサシステムのリセット制御回路 | |
| JPH0433152A (ja) | バスシステム | |
| JPS60544A (ja) | 電源制御方式 | |
| JPS60649U (ja) | マルチcpuシステムの同期装置 | |
| JPS61221849A (ja) | バス制御方式 |