JPS58109345U - PLL synthesizer control circuit - Google Patents
PLL synthesizer control circuitInfo
- Publication number
- JPS58109345U JPS58109345U JP18698982U JP18698982U JPS58109345U JP S58109345 U JPS58109345 U JP S58109345U JP 18698982 U JP18698982 U JP 18698982U JP 18698982 U JP18698982 U JP 18698982U JP S58109345 U JPS58109345 U JP S58109345U
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- circuit
- pll
- pll synthesizer
- synthesizer control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は従来のPLLシンセイザ制御回路を示すブロッ
ク図、第2図は本考案のPLLシンセサイザ制御回路の
一実施例を示すブロック図である。
1・・・・・・PLL回路、2・・・・・・プログラマ
ブルカウンタ、3・・・・・・入力端子、4・・・・・
・入力回路、8・・・・・・制御回路、9・・・・・・
表示回路、10・・・・・・水晶発振子、11・・・・
・・基準カウンタ、12・・・・・・位相検出回路、1
3・・・・・・フィルタ回路、14・・・・・・電圧制
御形見振器、15・・・・・・プリスケーラ。FIG. 1 is a block diagram showing a conventional PLL synthesizer control circuit, and FIG. 2 is a block diagram showing an embodiment of the PLL synthesizer control circuit of the present invention. 1...PLL circuit, 2...Programmable counter, 3...Input terminal, 4...
・Input circuit, 8... Control circuit, 9...
Display circuit, 10...Crystal oscillator, 11...
...Reference counter, 12... Phase detection circuit, 1
3...Filter circuit, 14...Voltage control token, 15...Prescaler.
Claims (1)
る基準カウンタを内蔵する周波数シンセサイザPLL回
路と、少な(とべ同周波数シンセサイザPLLへのプロ
グラムコードの供給ならびに入力回路の制御機能をもつ
ROM内蔵形の制御回路とを備えるとともに、前記基準
カウンタの出力信号が、前記制御回路へ常時結合されて
なり、前記基準カウンタの出力信号により前記制御回路
の動作の時間基準が設定されることを特徴とするPLL
シンセサイザ制御回路。A frequency synthesizer PLL circuit that has a built-in crystal oscillation circuit and a reference counter that divides the oscillation signal of the crystal oscillation circuit, and a built-in ROM that has the function of supplying program code to the frequency synthesizer PLL and controlling the input circuit. and a control circuit, the output signal of the reference counter is always coupled to the control circuit, and the output signal of the reference counter sets a time reference for the operation of the control circuit. PLL
Synthesizer control circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18698982U JPS58109345U (en) | 1982-12-09 | 1982-12-09 | PLL synthesizer control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18698982U JPS58109345U (en) | 1982-12-09 | 1982-12-09 | PLL synthesizer control circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58109345U true JPS58109345U (en) | 1983-07-26 |
Family
ID=30102711
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18698982U Pending JPS58109345U (en) | 1982-12-09 | 1982-12-09 | PLL synthesizer control circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58109345U (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4992913A (en) * | 1973-01-09 | 1974-09-04 | ||
JPS5099254A (en) * | 1973-12-27 | 1975-08-06 | ||
JPS5177111A (en) * | 1974-12-27 | 1976-07-03 | Sanyo Electric Co |
-
1982
- 1982-12-09 JP JP18698982U patent/JPS58109345U/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4992913A (en) * | 1973-01-09 | 1974-09-04 | ||
JPS5099254A (en) * | 1973-12-27 | 1975-08-06 | ||
JPS5177111A (en) * | 1974-12-27 | 1976-07-03 | Sanyo Electric Co |
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