JPS6052735U - PLL circuit - Google Patents
PLL circuitInfo
- Publication number
- JPS6052735U JPS6052735U JP14561683U JP14561683U JPS6052735U JP S6052735 U JPS6052735 U JP S6052735U JP 14561683 U JP14561683 U JP 14561683U JP 14561683 U JP14561683 U JP 14561683U JP S6052735 U JPS6052735 U JP S6052735U
- Authority
- JP
- Japan
- Prior art keywords
- charge pump
- controlled oscillator
- voltage controlled
- pll circuit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は変調回路を含む従来のＰＬＬ回路を示すブロッ
ク図、第２図は第１図の各部の波形を示す波形図、第３
図は本考案の実施例を示す要部回路図、第４図は第３図
の各部の波形を示す波形図、第５図は本考案の他の実施
例を示す要部回路図、第６図及び第７図は変調回路の具
体回路例を示す回路図である。
主な図番の説明、１・・・電圧制御発振器、３・・・プ
ログラマブルデイバイブ、４・・・リファレンスディ
・バイブ、５・・・水晶発振器、６・・・位相比較器、
７・・・チャージポンプ、１０・・・ローパスフィルタ
、１１．１２−・・変調回路、１４ ａ、 １４ ｂ
・・・ＮＯＲゲート、１５・・・トランスミッションゲ
ート。
第２図
第５図Fig. 1 is a block diagram showing a conventional PLL circuit including a modulation circuit, Fig. 2 is a waveform diagram showing waveforms of each part in Fig. 1, and Fig.
4 is a waveform diagram showing the waveforms of each part of FIG. 3. FIG. 5 is a main circuit diagram showing another embodiment of the invention. 7 and 7 are circuit diagrams showing specific circuit examples of the modulation circuit. Explanation of main figure numbers, 1... Voltage controlled oscillator, 3... Programmable vibration, 4... Reference diode.
・Vibe, 5...Crystal oscillator, 6...Phase comparator,
7...Charge pump, 10...Low pass filter, 11.12-...Modulation circuit, 14a, 14b
...NOR gate, 15...transmission gate. Figure 2 Figure 5
Claims (1)
信号とを位相比較する位相比較器と、該位相比較器の出
力端子に接続されたチャージポンプと、該チャージポン
プの出力を積分し前記電圧制御発振器の制御電圧を出力
するローパスフィルタと、前記電圧制御発振器の発振周
波数をデジタル信号で変調する変調回路とを有し、前記
デジタル信号により変調を行なう際は、前記チャージポ
ンプの出力をハイインピーダンス状態あるいは開放状態
とすることを特徴としたＰＬＬ回路。a phase comparator that compares the phases of a frequency-divided signal obtained by dividing the oscillation frequency of the voltage controlled oscillator and a reference signal; a charge pump connected to the output terminal of the phase comparator; and a charge pump that integrates the output of the charge pump and It has a low-pass filter that outputs the control voltage of the voltage controlled oscillator, and a modulation circuit that modulates the oscillation frequency of the voltage controlled oscillator with a digital signal, and when modulating with the digital signal, the output of the charge pump is set to high. A PLL circuit characterized by being in an impedance state or an open state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14561683U JPS6052735U (en) | 1983-09-19 | 1983-09-19 | PLL circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14561683U JPS6052735U (en) | 1983-09-19 | 1983-09-19 | PLL circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6052735U true JPS6052735U (en) | 1985-04-13 |
| JPH054330Y2 JPH054330Y2 (en) | 1993-02-03 |
Family
ID=30324374
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14561683U Granted JPS6052735U (en) | 1983-09-19 | 1983-09-19 | PLL circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6052735U (en) |
-
1983
- 1983-09-19 JP JP14561683U patent/JPS6052735U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH054330Y2 (en) | 1993-02-03 |
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