JPS5810855B2 - Tasou High Senkou Zou no Seihou - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a multilayer wiring structure suitable for use in various semiconductor devices and various integrated circuit devices.

In recent years, as semiconductor devices have become more densely integrated, there has been a demand for manufacturing methods that are highly reliable and suitable for mass production.

In particular, various improvements have been made to multilayer wiring for extracting electrodes from semiconductor substrates, or methods for attaching them to ceramic substrates by face-down bonding for extracting external electrodes, gradually meeting the above requirements.

FIGS. 1 and 2 are cross-sectional views of typical conventional multilayer wiring structures.

To briefly explain this, in both the cases of FIG. 1 and FIG. After providing a hole for extraction in the first insulating film, a first conductive layer 3 (made of Al, for example) is formed on the first insulating film 2 by a vapor deposition method or the like.

Next, a second insulating film 4 is formed of glass, SiO2, etc. using a vapor phase reaction method or a sputtering method, and then a hole is formed in the second insulating film 4 by photoetching to expose the upper and lower layer contact regions 6.

Furthermore, in the case of FIG.
A conductive layer 5 is formed, and in the case of FIG. 2, a second conductive layer 5 consisting of a metal pad for face-down bonding is similarly formed.

The metal pad in the case of Fig. 2 is usually Cr-Cu-
A three-layer structure of Au is used.

In addition to these structures, although not shown, an electrode lead-out structure using metal pads as shown in FIG. 2 may be provided on the two-layer wiring structure shown in FIG. 1.

According to the conventional multilayer wiring forming method as described above, there are five problems in that it is difficult to obtain reliable and low resistance electrical contact in the contact area 6 between the upper and lower layers.

The first reason for this is that the HF-NH4 etchant for SiO2, which has conventionally been considered difficult to etch Al deposited films, does not necessarily have sufficient selectivity.

That is, for example, when the base of the Al deposited film is an insulating material such as SiO2, the etch rate is 40 to 50 A/min, and when the base is p-type paper resistance silicon, the etch rate is 80 to 120 A/min.
A/min, and when the base is n-type low-resistance silicon, it is 150 to 250 A/min. When the etch rate increases like this, it often occurs when etching a glass or SiO2 film with the above etchant. Useful base A [
This is because the deposited film is also etched and its surface is altered.

The second reason is that impurities may adhere to the surface of the first layer of AA deposited film or a thin insulating film may be formed due to the etching process.

That is, when the first layer of Al vapor deposition is completed and the surface of the vapor-deposited film is exposed to the atmosphere, an oxide film of about 40 to 100 A is formed on the surface, so that reliable and low-resistance contact between the upper and lower layers can be achieved. It cannot be done.

In addition to this, insufficient etching of the second insulating film, etc., prevents obtaining good electrical contact.

Therefore, reliable and low-resistance electrical contact between the upper and lower layers cannot be achieved unless harmful oxide films and corrosion products generated on the surface of the lower conductive layer are eliminated.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a multilayer wiring structure that can solve the above-mentioned problems and ensure reliable, low-resistance electrical contact between upper and lower layers.

According to the present invention, this purpose is to use Cr, Ni, and Ti that can withstand etching during etching for forming connection holes.
, Mo, W, Pd, Pt, or In by covering the portion of the lower conductive layer corresponding to the contact hole.

In order to reduce the formation of an oxide film, it is desirable in this case to form the metal layer with an oxidation-resistant metal.

Further, when an oxidation-resistant metal is not used, it is preferable to remove the metal layer in a non-oxidizing atmosphere such as in a vacuum by, for example, sputter etching.

Hereinafter, the manufacturing method of the present invention will be described in detail with reference to Examples.

FIGS. 3a and 3b show the manufacturing process according to the first embodiment of the present invention.

First, as shown in a, Si is deposited on the surface of a semiconductor substrate 1 made of, for example, silicon by a thermal oxidation method or a chemical vapor phase reaction method.
A first insulating film 2 made of O2 or the like is formed.

After forming a hole for taking out the electrode in this first insulating film,
Then, without breaking the vacuum, Cr was vacuum-deposited to a thickness of 0.1μ, after which it was exposed to the atmosphere and unnecessary parts were removed by photo-etching. A double layer of a first conductive layer 3 made of Al and a protective metal layer 8 made of Cr is formed.

This metal layer 8 prevents the surface of the conductive layer 30 from being contaminated with impurities, oxidation, etc.
This is to protect against excessive etching.

In the case of the above photoetching, for example, a ferricyanide potassium solution is used as the etchant.

Next, a second insulating film 4 made of SiO2 is formed to a thickness of about 3 .mu.m by high frequency sputtering, and a contact hole 7 is formed by photoetching again so as to expose a portion of the metal layer 8.

In this case, an HF-NH4F aqueous solution is used as the etchant.

Further, the structure shown in FIG. 1a is set in a vacuum chamber of a vacuum evaporation apparatus equipped with a sputter etching mechanism, and a portion of the metal layer 8 in the connection hole 7 is etched by sputter etching, as shown in FIG. remove.

The sputter etching of the layer 8 made of a 0.1 .mu.m thick Cr vapor deposited film is carried out using a DC bipolar method in an argon atmosphere of 3.times.1 O@-2 Torr with a voltage of 2 KV applied for 2 minutes.

Immediately after completing this sputter etching, the apparatus is switched to a high vacuum evaporation mode to evaporate Al to a thickness of about 2 μm, and then photoetched to form the desired pattern to form the second conductive layer 5 made of Al. .

In this case, a normal PAN (phosphoric acid-acetic acid-nitric acid-water) etchant is used.

Figures 4a and 4b show an example in which the second conductive layer 5 made of a metal pad for face-down bonding is brought into electrical contact with the first conductive layer 3 formed by a method similar to the manufacturing method shown in Figure 3. 3, and the same effect as in the case of FIG. 3 can be obtained.

In addition, in the methods shown in FIGS. 3 and 4, it is also possible to use a Pd vapor deposited film instead of Cr as the metal layer 8. In this case, since the Pd vapor deposited film is oxidation resistant, a sputter etching process is not necessary. Not necessarily necessary.

That is, the first and second conductive layers (upper and lower layers) made of Al
can be electrically contacted via a metal layer made of Pd, resulting in a reliable connection.

In the above embodiment, the metal layer 8 includes N in addition to Cr.
I, Ti, Mo, or W can be used, and in addition to Pd, pt, In, etc. are also suitable when oxidation resistance is taken into consideration.

In addition, these metal materials are determined based on the nature of the present invention and the etchant for the second insulating film.
It is not limited to the above.

As is clear from the above detailed description, according to the present invention, the surface of the underlying conductive layer is not directly exposed to the outside world, so that harmful insulators may be generated, contamination with impurities, deterioration or corrosion caused by etchant, etc. Therefore, reliable and low resistance electrical contact can be obtained between the upper and lower conductive layers.

In addition, when conventionally measuring the voltage-current characteristics of the contact area between the upper and lower layers, a voltage of several volts to several tens of volts was generated when electricity was applied, and a so-called fritting phenomenon was observed, but when the present invention is applied, Since almost ideal contact can be obtained, such a phenomenon can be prevented.

Furthermore, the first and second conductive layers 3 and 5 are in direct contact,
Cr, Ni, Ti, Mo, W.

Pd, Pt, and In do not form brittle compounds even if they come into contact with Al and are subjected to high heat, so the first and second conductive layers 3 and 5
The reliable and low-resistance electrical contact between the two does not change over time, and therefore a highly reliable semiconductor device can be obtained.

The present invention can be particularly effectively used for drawing out electrodes of transistors and multilayer wiring of integrated circuit devices, but it goes without saying that the application is not limited thereto.

[Brief explanation of the drawing]

1 and 2 are cross-sectional views showing a conventional multilayer wiring structure, FIGS. 3a and 3b are cross-sectional views showing a method for manufacturing a multilayer wiring structure according to an embodiment of the present invention, and FIGS. 4a and b FIG. 3 is a cross-sectional view showing a manufacturing method according to another embodiment of the present invention. Explanation of symbols 1... Semiconductor substrate, 2... First insulating film, 3... First conductive layer, 4... Second insulating film, 5...
...Second conductive layer, 6. Contact area, 7. Connection hole, 8. Corrosion-resistant conductive layer.

Claims (1)

[Claims] 1. After covering a first conductive layer of Al formed on an arbitrary substrate with an insulating film, a hole is formed in the insulating film to expose a part of the first conductive layer. , A that electrically contacts the portion of the first conductive layer through the hole.
Cr, Ni, Ti, Mo,
,W. The hole is formed by covering at least a portion of the first conductive layer with an etching-resistant metal layer selected from Pd, Pt, and In;
A method for manufacturing a multilayer wiring structure, characterized in that, prior to forming the conductive layer, the metal layer in the hole is removed by sputter etching in a non-oxidizing atmosphere and the second conductive layer is formed without exposing it to an oxidizing atmosphere. .