JPS5795633A - Etching method - Google Patents

Etching method

Info

Publication number
JPS5795633A
JPS5795633A JP17170180A JP17170180A JPS5795633A JP S5795633 A JPS5795633 A JP S5795633A JP 17170180 A JP17170180 A JP 17170180A JP 17170180 A JP17170180 A JP 17170180A JP S5795633 A JPS5795633 A JP S5795633A
Authority
JP
Japan
Prior art keywords
substrate
region
etching
oxide film
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17170180A
Other languages
Japanese (ja)
Inventor
Shigeo Kodama
Takaaki Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17170180A priority Critical patent/JPS5795633A/en
Publication of JPS5795633A publication Critical patent/JPS5795633A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

PURPOSE:To form concave parts having different depths or concave parts having stepped parts in a substrate by selectively forming a film whose etching speed is slower than that of the substrate on a plurality of regions on the surface of of the substrate with the thickness being changed. CONSTITUTION:In the process of preparing the element separating substrate of e.g. magnesia spinel, an oxide film 2 of 6,000Angstrom is formed on the (100) substrate 1. Then the film 2 in a low voltage withstanding element forming region is etched and removed, and the oxide film of 2,000Angstrom is formd in a hole. Thereafter the film 2 on a high voltage withstanding region 5 is etched and removed. Then, e.g., the etching of the region 5 and etching of the oxide film in the hole and its lower region are performed by anisotropic etching by using e.g. KOH liquid. Thus the concave parts 6 and 8 having different depths are formed. Or thin oxide film is partially provided in the hole region, and the structure having the step in the concave part is formed. Thereafter, a spinel layer 9 and an Si layer are sequentially grown epitaxially in the concave parts 6 and 8, and a transistor and the like are formed in the Si layer. Thus the element forming region having different voltage withstanding properties can be formed by one etching process.
JP17170180A 1980-12-05 1980-12-05 Etching method Pending JPS5795633A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17170180A JPS5795633A (en) 1980-12-05 1980-12-05 Etching method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17170180A JPS5795633A (en) 1980-12-05 1980-12-05 Etching method

Publications (1)

Publication Number Publication Date
JPS5795633A true JPS5795633A (en) 1982-06-14

Family

ID=15928071

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17170180A Pending JPS5795633A (en) 1980-12-05 1980-12-05 Etching method

Country Status (1)

Country Link
JP (1) JPS5795633A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4861731A (en) * 1988-02-02 1989-08-29 General Motors Corporation Method of fabricating a lateral dual gate thyristor
US4882294A (en) * 1988-08-17 1989-11-21 Delco Electronics Corporation Process for forming an epitaxial layer having portions of different thicknesses
US5049522A (en) * 1990-02-09 1991-09-17 Hughes Aircraft Company Semiconductive arrangement having dissimilar, laterally spaced layer structures, and process for fabricating the same
DE4132105A1 (en) * 1990-09-26 1992-04-09 Hitachi Ltd Prodn. of curved structure for e.g. semiconductor accelerometer - comprises two=stage anisotropic etching of wafer using different masks
US6693045B2 (en) 2001-03-02 2004-02-17 Benq Corporation High density wafer production method
US7485238B2 (en) * 2001-08-31 2009-02-03 Daishinku Corporation Etching method, etched product formed by the same, and piezoelectric vibration device, method for producing the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4861731A (en) * 1988-02-02 1989-08-29 General Motors Corporation Method of fabricating a lateral dual gate thyristor
US4882294A (en) * 1988-08-17 1989-11-21 Delco Electronics Corporation Process for forming an epitaxial layer having portions of different thicknesses
US5049522A (en) * 1990-02-09 1991-09-17 Hughes Aircraft Company Semiconductive arrangement having dissimilar, laterally spaced layer structures, and process for fabricating the same
DE4132105A1 (en) * 1990-09-26 1992-04-09 Hitachi Ltd Prodn. of curved structure for e.g. semiconductor accelerometer - comprises two=stage anisotropic etching of wafer using different masks
US6693045B2 (en) 2001-03-02 2004-02-17 Benq Corporation High density wafer production method
US7485238B2 (en) * 2001-08-31 2009-02-03 Daishinku Corporation Etching method, etched product formed by the same, and piezoelectric vibration device, method for producing the same

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