JPS5794844A - Data processor - Google Patents

Data processor

Info

Publication number
JPS5794844A
JPS5794844A JP16958980A JP16958980A JPS5794844A JP S5794844 A JPS5794844 A JP S5794844A JP 16958980 A JP16958980 A JP 16958980A JP 16958980 A JP16958980 A JP 16958980A JP S5794844 A JPS5794844 A JP S5794844A
Authority
JP
Japan
Prior art keywords
memory
program
address
contents
unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16958980A
Other languages
Japanese (ja)
Inventor
Yasuhiko Makiura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16958980A priority Critical patent/JPS5794844A/en
Publication of JPS5794844A publication Critical patent/JPS5794844A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To simplify the correcting job of a data processor, by switching an unrewritable memory to a rewritable memory and then repeating the correction through trial and error.
CONSTITUTION: A program executing unit 21 interprets and executes an initializing program stored in a memory 1. The initializing program gives a set indication to an FF5 and shifts the contents of an address (j) to a register in the unit 21. After this, the program gives a reset indication to the FF5 and shifts the contents stored in the register to the address (j). The same action is repeated successively from addresses j+1, j+2 through an address (k). Then the contents of a memory 2 are shifted to a memory 3. The initializing program gives a reset indication to the FF5 and then completes its operation. After this, an access is always given to the memory 3 for addresses (j)W(k). Accordingly, the unit 21 uses the memory 3 in place of the memory 2 and reads the program out of the memory 3 to execute it.
COPYRIGHT: (C)1982,JPO&Japio
JP16958980A 1980-12-03 1980-12-03 Data processor Pending JPS5794844A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16958980A JPS5794844A (en) 1980-12-03 1980-12-03 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16958980A JPS5794844A (en) 1980-12-03 1980-12-03 Data processor

Publications (1)

Publication Number Publication Date
JPS5794844A true JPS5794844A (en) 1982-06-12

Family

ID=15889280

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16958980A Pending JPS5794844A (en) 1980-12-03 1980-12-03 Data processor

Country Status (1)

Country Link
JP (1) JPS5794844A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059437A (en) * 1983-09-10 1985-04-05 Fujitsu Denso Ltd Table correcting method
JPS61166630A (en) * 1985-01-19 1986-07-28 Panafacom Ltd Microprogram control system
JPS61236098A (en) * 1985-04-10 1986-10-21 Nec Corp Rom program controller

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5148951A (en) * 1974-10-25 1976-04-27 Hitachi Ltd
JPS545343A (en) * 1977-06-15 1979-01-16 Toshiba Corp Micro program processing system
JPS55118150A (en) * 1979-03-05 1980-09-10 Nec Corp Computer circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5148951A (en) * 1974-10-25 1976-04-27 Hitachi Ltd
JPS545343A (en) * 1977-06-15 1979-01-16 Toshiba Corp Micro program processing system
JPS55118150A (en) * 1979-03-05 1980-09-10 Nec Corp Computer circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6059437A (en) * 1983-09-10 1985-04-05 Fujitsu Denso Ltd Table correcting method
JPS61166630A (en) * 1985-01-19 1986-07-28 Panafacom Ltd Microprogram control system
JPS61236098A (en) * 1985-04-10 1986-10-21 Nec Corp Rom program controller

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