JPS5789247A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5789247A JPS5789247A JP55164562A JP16456280A JPS5789247A JP S5789247 A JPS5789247 A JP S5789247A JP 55164562 A JP55164562 A JP 55164562A JP 16456280 A JP16456280 A JP 16456280A JP S5789247 A JPS5789247 A JP S5789247A
- Authority
- JP
- Japan
- Prior art keywords
- region
- analog
- dielectric strength
- iil
- grown
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title 1
- 230000000994 depressogenic effect Effects 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 238000010276 construction Methods 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
- H01L27/0244—I2L structures integrated in combination with analog structures
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
PURPOSE:To increase dielectric strength of an analog region by a method wherein an epitaxial layer is grown on a substrate with a depressed area. An analog circuit is formed in the thicker part of the epitaxial layer, while a digital circuit is in the thin part of the same. CONSTITUTION:A depressed area and n type high density layers 3, 6 are produced on a p type silicon substrate 1, on which n type layers 7 are grown by epitaxial growth and isolation regions 9 are also formed. After this, an n-p-n transistor for analog is formed at a higher dielectric region 7a and, on the other hand, an IIL region is formed at a lower dielectric region 7b. By such construction of the analog-digital hybrid integrated circuit, dielectric strength of the alalog region can be increased, and, at the same time, the hard flow hFE of the IIL region can be strengthened. In addition, the area of the higher dielectric strength region can be reduced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55164562A JPS5789247A (en) | 1980-11-25 | 1980-11-25 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP55164562A JPS5789247A (en) | 1980-11-25 | 1980-11-25 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5789247A true JPS5789247A (en) | 1982-06-03 |
Family
ID=15795515
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP55164562A Pending JPS5789247A (en) | 1980-11-25 | 1980-11-25 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5789247A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4948748A (en) * | 1985-09-30 | 1990-08-14 | Kabushiki Kaisha Toshiba | Manufacture of a substrate structure for a composite semiconductor device using wafer bonding and epitaxial refill |
| US9583290B2 (en) | 2013-08-08 | 2017-02-28 | Nippon Soken, Inc. | Solenoid device |
-
1980
- 1980-11-25 JP JP55164562A patent/JPS5789247A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4948748A (en) * | 1985-09-30 | 1990-08-14 | Kabushiki Kaisha Toshiba | Manufacture of a substrate structure for a composite semiconductor device using wafer bonding and epitaxial refill |
| US9583290B2 (en) | 2013-08-08 | 2017-02-28 | Nippon Soken, Inc. | Solenoid device |
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