JPS578823A - Initializing method for logical lsi - Google Patents

Initializing method for logical lsi

Info

Publication number
JPS578823A
JPS578823A JP8237280A JP8237280A JPS578823A JP S578823 A JPS578823 A JP S578823A JP 8237280 A JP8237280 A JP 8237280A JP 8237280 A JP8237280 A JP 8237280A JP S578823 A JPS578823 A JP S578823A
Authority
JP
Japan
Prior art keywords
initialization
lsi
output pins
initializing
logical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8237280A
Other languages
Japanese (ja)
Inventor
Masuyuki Ikezawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8237280A priority Critical patent/JPS578823A/en
Publication of JPS578823A publication Critical patent/JPS578823A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318541—Scan latches or cell details

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To set an initial value easily during an LSI test by making the output pins of a logical LSI bilateral and by initializing a storage device by inputting an initializing signal from those output pins. CONSTITUTION:In a logical LSI having storage elements in a logical circuit, buffers 16 and 17 right prior to output pins 18 and 19 use bilateral buffers. In initialization, placing an initializing input pin 11 in initialization mode sets or resets the storage elements 12, 13, 14, and 15 in the inside of the LSI from the output pins 18 and 19 made bilateral. Signal lines 20 and 21 for initialization are connected properly to achieve initialization in different mode. Thus, at least two kinds of initialization are possible and the initialization during a test of the LSI is facilitated.
JP8237280A 1980-06-18 1980-06-18 Initializing method for logical lsi Pending JPS578823A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8237280A JPS578823A (en) 1980-06-18 1980-06-18 Initializing method for logical lsi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8237280A JPS578823A (en) 1980-06-18 1980-06-18 Initializing method for logical lsi

Publications (1)

Publication Number Publication Date
JPS578823A true JPS578823A (en) 1982-01-18

Family

ID=13772751

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8237280A Pending JPS578823A (en) 1980-06-18 1980-06-18 Initializing method for logical lsi

Country Status (1)

Country Link
JP (1) JPS578823A (en)

Similar Documents

Publication Publication Date Title
EP0154048A3 (en) Circuit for generating test signals for in-circuit digital testing
GB2195185B (en) Testing circuits comprising integrated circuits provided on a carrier
GB2085171B (en) Lsi chip logic testing system resident on an lsi chip
DE3382311D1 (en) Online-monitor.
EP0148403A3 (en) Linear feedback shift register
EP0042351A3 (en) Supporting element for integrated circuits
JPS578823A (en) Initializing method for logical lsi
DE2964891D1 (en) Method and apparatus for testing fixed function logic circuits
JPS5787149A (en) Large-scale integrated circuit
JPS5627667A (en) Method of estimating semiconductor device
JPS5745942A (en) Semiconductor integrated circuit device
JPS57204140A (en) Large-scale integrated circuit
JPS57210640A (en) Large scale integrated circuit
JPS5537924A (en) Integrated circuit
JPS57178542A (en) Integrated circuit
JPS5572261A (en) Logic unit
JPS5222846A (en) Data processing unit
JPS5658671A (en) Tester for logical circuit
JPS57127996A (en) Check input data set circuit for shift register constituted logical circuit function testing device
JPS6415675A (en) Circuit for testing integrated circuit
JPS52152254A (en) Operation checking method of electronic apparatus
JPS56145370A (en) Logic circuit
JPS6448089A (en) Apparatus for education of logical circuit
JPS5582972A (en) Testing system of highly integrated circuit
JPS55107964A (en) Device for evaluation of integrated circuit